3777f7748a
Linux has framebuffer backlight support infrastructure which should be used to expose backlight attributes. Mainstone should use it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
566 lines
14 KiB
C
566 lines
14 KiB
C
/*
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* linux/arch/arm/mach-pxa/mainstone.c
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*
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* Support for the Intel HCDDBBVA0 Development Platform.
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* (go figure how they came up with such name...)
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*
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* Author: Nicolas Pitre
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* Created: Nov 05, 2002
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* Copyright: MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/sysdev.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <linux/bitops.h>
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#include <linux/fb.h>
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#include <linux/ioport.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/backlight.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/mach-types.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/sizes.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/flash.h>
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#include <asm/arch/pxa-regs.h>
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#include <asm/arch/mainstone.h>
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#include <asm/arch/audio.h>
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#include <asm/arch/pxafb.h>
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#include <asm/arch/mmc.h>
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#include <asm/arch/irda.h>
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#include <asm/arch/ohci.h>
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#include "generic.h"
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#include "devices.h"
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static unsigned long mainstone_irq_enabled;
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static void mainstone_mask_irq(unsigned int irq)
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{
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int mainstone_irq = (irq - MAINSTONE_IRQ(0));
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MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
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}
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static void mainstone_unmask_irq(unsigned int irq)
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{
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int mainstone_irq = (irq - MAINSTONE_IRQ(0));
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/* the irq can be acknowledged only if deasserted, so it's done here */
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MST_INTSETCLR &= ~(1 << mainstone_irq);
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MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
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}
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static struct irq_chip mainstone_irq_chip = {
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.name = "FPGA",
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.ack = mainstone_mask_irq,
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.mask = mainstone_mask_irq,
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.unmask = mainstone_unmask_irq,
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};
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static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
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do {
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GEDR(0) = GPIO_bit(0); /* clear useless edge notification */
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if (likely(pending)) {
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irq = MAINSTONE_IRQ(0) + __ffs(pending);
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desc = irq_desc + irq;
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desc_handle_irq(irq, desc);
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}
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pending = MST_INTSETCLR & mainstone_irq_enabled;
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} while (pending);
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}
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static void __init mainstone_init_irq(void)
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{
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int irq;
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pxa27x_init_irq();
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/* setup extra Mainstone irqs */
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for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
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set_irq_chip(irq, &mainstone_irq_chip);
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set_irq_handler(irq, handle_level_irq);
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if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
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else
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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set_irq_flags(MAINSTONE_IRQ(8), 0);
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set_irq_flags(MAINSTONE_IRQ(12), 0);
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MST_INTMSKENA = 0;
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MST_INTSETCLR = 0;
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set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
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set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
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}
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#ifdef CONFIG_PM
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static int mainstone_irq_resume(struct sys_device *dev)
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{
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MST_INTMSKENA = mainstone_irq_enabled;
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return 0;
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}
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static struct sysdev_class mainstone_irq_sysclass = {
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.name = "cpld_irq",
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.resume = mainstone_irq_resume,
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};
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static struct sys_device mainstone_irq_device = {
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.cls = &mainstone_irq_sysclass,
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};
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static int __init mainstone_irq_device_init(void)
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{
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int ret = sysdev_class_register(&mainstone_irq_sysclass);
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if (ret == 0)
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ret = sysdev_register(&mainstone_irq_device);
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return ret;
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}
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device_initcall(mainstone_irq_device_init);
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#endif
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = (MST_ETH_PHYS + 0x300),
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.end = (MST_ETH_PHYS + 0xfffff),
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = MAINSTONE_IRQ(3),
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.end = MAINSTONE_IRQ(3),
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
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{
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
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return 0;
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}
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static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
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{
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
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}
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static long mst_audio_suspend_mask;
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static void mst_audio_suspend(void *priv)
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{
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mst_audio_suspend_mask = MST_MSCWR2;
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MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
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}
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static void mst_audio_resume(void *priv)
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{
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MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
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}
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static pxa2xx_audio_ops_t mst_audio_ops = {
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.startup = mst_audio_startup,
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.shutdown = mst_audio_shutdown,
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.suspend = mst_audio_suspend,
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.resume = mst_audio_resume,
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};
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static struct platform_device mst_audio_device = {
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.name = "pxa2xx-ac97",
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.id = -1,
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.dev = { .platform_data = &mst_audio_ops },
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};
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static struct resource flash_resources[] = {
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[0] = {
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.start = PXA_CS0_PHYS,
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.end = PXA_CS0_PHYS + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = PXA_CS1_PHYS,
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.end = PXA_CS1_PHYS + SZ_64M - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct mtd_partition mainstoneflash0_partitions[] = {
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{
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.name = "Bootloader",
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.size = 0x00040000,
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.offset = 0,
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.mask_flags = MTD_WRITEABLE /* force read-only */
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},{
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.name = "Kernel",
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.size = 0x00400000,
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.offset = 0x00040000,
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},{
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.name = "Filesystem",
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.size = MTDPART_SIZ_FULL,
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.offset = 0x00440000
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}
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};
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static struct flash_platform_data mst_flash_data[2] = {
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{
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.map_name = "cfi_probe",
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.parts = mainstoneflash0_partitions,
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.nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
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}, {
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.map_name = "cfi_probe",
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.parts = NULL,
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.nr_parts = 0,
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}
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};
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static struct platform_device mst_flash_device[2] = {
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{
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.name = "pxa2xx-flash",
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.id = 0,
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.dev = {
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.platform_data = &mst_flash_data[0],
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},
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.resource = &flash_resources[0],
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.num_resources = 1,
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},
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{
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.name = "pxa2xx-flash",
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.id = 1,
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.dev = {
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.platform_data = &mst_flash_data[1],
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},
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.resource = &flash_resources[1],
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.num_resources = 1,
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},
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};
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#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
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static int mainstone_backlight_update_status(struct backlight_device *bl)
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{
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int brightness = bl->props.brightness;
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if (bl->props.power != FB_BLANK_UNBLANK ||
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bl->props.fb_blank != FB_BLANK_UNBLANK)
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brightness = 0;
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if (brightness != 0) {
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pxa_gpio_mode(GPIO16_PWM0_MD);
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pxa_set_cken(CKEN_PWM0, 1);
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}
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PWM_CTRL0 = 0;
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PWM_PWDUTY0 = brightness;
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PWM_PERVAL0 = bl->props.max_brightness;
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if (brightness == 0)
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pxa_set_cken(CKEN_PWM0, 0);
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return 0; /* pointless return value */
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}
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static int mainstone_backlight_get_brightness(struct backlight_device *bl)
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{
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return PWM_PWDUTY0;
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}
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static /*const*/ struct backlight_ops mainstone_backlight_ops = {
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.update_status = mainstone_backlight_update_status,
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.get_brightness = mainstone_backlight_get_brightness,
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};
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static void __init mainstone_backlight_register(void)
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{
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struct backlight_device *bl;
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bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev,
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NULL, &mainstone_backlight_ops);
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if (IS_ERR(bl)) {
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printk(KERN_ERR "mainstone: unable to register backlight: %ld\n",
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PTR_ERR(bl));
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return;
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}
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/*
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* broken design - register-then-setup interfaces are
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* utterly broken by definition.
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*/
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bl->props.max_brightness = 1023;
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bl->props.brightness = 1023;
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backlight_update_status(bl);
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}
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#else
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#define mainstone_backlight_register() do { } while (0)
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#endif
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static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
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.pixclock = 50000,
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.xres = 640,
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.yres = 480,
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.bpp = 16,
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.hsync_len = 1,
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.left_margin = 0x9f,
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.right_margin = 1,
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.vsync_len = 44,
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.upper_margin = 0,
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.lower_margin = 0,
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.sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
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};
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static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
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.pixclock = 110000,
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.xres = 240,
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.yres = 320,
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.bpp = 16,
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.hsync_len = 4,
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.left_margin = 8,
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.right_margin = 20,
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.vsync_len = 3,
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.upper_margin = 1,
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.lower_margin = 10,
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.sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
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};
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static struct pxafb_mach_info mainstone_pxafb_info = {
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.num_modes = 1,
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.lccr0 = LCCR0_Act,
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.lccr3 = LCCR3_PCP,
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};
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static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
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{
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int err;
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/*
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* setup GPIO for PXA27x MMC controller
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*/
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pxa_gpio_mode(GPIO32_MMCCLK_MD);
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pxa_gpio_mode(GPIO112_MMCCMD_MD);
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pxa_gpio_mode(GPIO92_MMCDAT0_MD);
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pxa_gpio_mode(GPIO109_MMCDAT1_MD);
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pxa_gpio_mode(GPIO110_MMCDAT2_MD);
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pxa_gpio_mode(GPIO111_MMCDAT3_MD);
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/* make sure SD/Memory Stick multiplexer's signals
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* are routed to MMC controller
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*/
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MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
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err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
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"MMC card detect", data);
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if (err) {
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printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
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return -1;
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}
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return 0;
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}
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static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
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{
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struct pxamci_platform_data* p_d = dev->platform_data;
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if (( 1 << vdd) & p_d->ocr_mask) {
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printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
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MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
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MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
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} else {
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printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
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MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
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}
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}
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static void mainstone_mci_exit(struct device *dev, void *data)
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{
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free_irq(MAINSTONE_MMC_IRQ, data);
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}
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static struct pxamci_platform_data mainstone_mci_platform_data = {
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.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
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.init = mainstone_mci_init,
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.setpower = mainstone_mci_setpower,
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.exit = mainstone_mci_exit,
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};
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static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
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{
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unsigned long flags;
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local_irq_save(flags);
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if (mode & IR_SIRMODE) {
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MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
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} else if (mode & IR_FIRMODE) {
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MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
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}
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if (mode & IR_OFF) {
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MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
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} else {
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MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
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}
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local_irq_restore(flags);
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}
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static struct pxaficp_platform_data mainstone_ficp_platform_data = {
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.transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
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.transceiver_mode = mainstone_irda_transceiver_mode,
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};
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static struct platform_device *platform_devices[] __initdata = {
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&smc91x_device,
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&mst_audio_device,
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&mst_flash_device[0],
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&mst_flash_device[1],
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};
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static int mainstone_ohci_init(struct device *dev)
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{
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/* setup Port1 GPIO pin. */
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pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
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pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
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/* Set the Power Control Polarity Low and Power Sense
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Polarity Low to active low. */
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UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
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~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
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return 0;
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}
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static struct pxaohci_platform_data mainstone_ohci_platform_data = {
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.port_mode = PMM_PERPORT_MODE,
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.init = mainstone_ohci_init,
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};
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static void __init mainstone_init(void)
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{
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int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
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mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
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mst_flash_data[1].width = 4;
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/* Compensate for SW7 which swaps the flash banks */
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mst_flash_data[SW7].name = "processor-flash";
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mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
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printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
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mst_flash_data[0].name);
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/* system bus arbiter setting
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* - Core_Park
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* - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
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*/
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ARB_CNTRL = ARB_CORE_PARK | 0x234;
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/*
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* On Mainstone, we route AC97_SYSCLK via GPIO45 to
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* the audio daughter card
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*/
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pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
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GPSR(GPIO48_nPOE) =
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GPIO_bit(GPIO48_nPOE) |
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GPIO_bit(GPIO49_nPWE) |
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GPIO_bit(GPIO50_nPIOR) |
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GPIO_bit(GPIO51_nPIOW) |
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GPIO_bit(GPIO85_nPCE_1) |
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GPIO_bit(GPIO54_nPCE_2);
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|
|
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pxa_gpio_mode(GPIO48_nPOE_MD);
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pxa_gpio_mode(GPIO49_nPWE_MD);
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|
pxa_gpio_mode(GPIO50_nPIOR_MD);
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|
pxa_gpio_mode(GPIO51_nPIOW_MD);
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pxa_gpio_mode(GPIO85_nPCE_1_MD);
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|
pxa_gpio_mode(GPIO54_nPCE_2_MD);
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|
pxa_gpio_mode(GPIO79_pSKTSEL_MD);
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|
pxa_gpio_mode(GPIO55_nPREG_MD);
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|
pxa_gpio_mode(GPIO56_nPWAIT_MD);
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|
pxa_gpio_mode(GPIO57_nIOIS16_MD);
|
|
|
|
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
|
|
|
/* reading Mainstone's "Virtual Configuration Register"
|
|
might be handy to select LCD type here */
|
|
if (0)
|
|
mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
|
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else
|
|
mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
|
|
|
|
set_pxa_fb_info(&mainstone_pxafb_info);
|
|
mainstone_backlight_register();
|
|
|
|
pxa_set_mci_info(&mainstone_mci_platform_data);
|
|
pxa_set_ficp_info(&mainstone_ficp_platform_data);
|
|
pxa_set_ohci_info(&mainstone_ohci_platform_data);
|
|
}
|
|
|
|
|
|
static struct map_desc mainstone_io_desc[] __initdata = {
|
|
{ /* CPLD */
|
|
.virtual = MST_FPGA_VIRT,
|
|
.pfn = __phys_to_pfn(MST_FPGA_PHYS),
|
|
.length = 0x00100000,
|
|
.type = MT_DEVICE
|
|
}
|
|
};
|
|
|
|
static void __init mainstone_map_io(void)
|
|
{
|
|
pxa_map_io();
|
|
iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
|
|
|
|
/* initialize sleep mode regs (wake-up sources, etc) */
|
|
PGSR0 = 0x00008800;
|
|
PGSR1 = 0x00000002;
|
|
PGSR2 = 0x0001FC00;
|
|
PGSR3 = 0x00001F81;
|
|
PWER = 0xC0000002;
|
|
PRER = 0x00000002;
|
|
PFER = 0x00000002;
|
|
/* for use I SRAM as framebuffer. */
|
|
PSLR |= 0xF04;
|
|
PCFR = 0x66;
|
|
/* For Keypad wakeup. */
|
|
KPC &=~KPC_ASACT;
|
|
KPC |=KPC_AS;
|
|
PKWR = 0x000FD000;
|
|
/* Need read PKWR back after set it. */
|
|
PKWR;
|
|
}
|
|
|
|
MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
|
|
/* Maintainer: MontaVista Software Inc. */
|
|
.phys_io = 0x40000000,
|
|
.boot_params = 0xa0000100, /* BLOB boot parameter setting */
|
|
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
|
|
.map_io = mainstone_map_io,
|
|
.init_irq = mainstone_init_irq,
|
|
.timer = &pxa_timer,
|
|
.init_machine = mainstone_init,
|
|
MACHINE_END
|