0990b1c657
I just realized this has a kmap_atomic bug in... The below would fix it - but it's complicating this code some more. Alternatively I would have to introduce something like pte_offset_map_irq() which would make the irq/nmi detection and leave the regular code paths alone, however that would mean either duplicating the gup_fast() pagewalk or passing down a pte function pointer, which would only duplicate the gup_pte_range() bit, neither is really attractive ... Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> CC: Nick Piggin <npiggin@suse.de> Cc: Mike Galbraith <efault@gmx.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
98 lines
2.6 KiB
C
98 lines
2.6 KiB
C
#ifndef _ASM_X86_PGTABLE_32_H
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#define _ASM_X86_PGTABLE_32_H
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#include <asm/pgtable_32_types.h>
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/*
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* The Linux memory management assumes a three-level page table setup. On
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* the i386, we use that, but "fold" the mid level into the top-level page
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* table, so that we physically have the same two-level page table as the
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* i386 mmu expects.
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*
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* This file contains the functions and defines necessary to modify and use
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* the i386 page table tree.
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*/
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#ifndef __ASSEMBLY__
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#include <asm/processor.h>
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#include <asm/fixmap.h>
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#include <linux/threads.h>
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#include <asm/paravirt.h>
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#include <linux/bitops.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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struct mm_struct;
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struct vm_area_struct;
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extern pgd_t swapper_pg_dir[1024];
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static inline void pgtable_cache_init(void) { }
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static inline void check_pgt_cache(void) { }
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void paging_init(void);
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extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t);
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/*
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* Define this if things work differently on an i386 and an i486:
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* it will (on an i486) warn about kernel memory accesses that are
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* done without a 'access_ok(VERIFY_WRITE,..)'
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*/
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#undef TEST_ACCESS_OK
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#ifdef CONFIG_X86_PAE
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# include <asm/pgtable-3level.h>
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#else
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# include <asm/pgtable-2level.h>
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#endif
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#if defined(CONFIG_HIGHPTE)
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#define __KM_PTE \
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(in_nmi() ? KM_NMI_PTE : \
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in_irq() ? KM_IRQ_PTE : \
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KM_PTE0)
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#define pte_offset_map(dir, address) \
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((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), __KM_PTE) + \
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pte_index((address)))
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#define pte_offset_map_nested(dir, address) \
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((pte_t *)kmap_atomic_pte(pmd_page(*(dir)), KM_PTE1) + \
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pte_index((address)))
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#define pte_unmap(pte) kunmap_atomic((pte), __KM_PTE)
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#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1)
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#else
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#define pte_offset_map(dir, address) \
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((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
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#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address))
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#define pte_unmap(pte) do { } while (0)
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#define pte_unmap_nested(pte) do { } while (0)
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#endif
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/* Clear a kernel PTE and flush it from the TLB */
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#define kpte_clear_flush(ptep, vaddr) \
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do { \
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pte_clear(&init_mm, (vaddr), (ptep)); \
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__flush_tlb_one((vaddr)); \
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} while (0)
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/*
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* The i386 doesn't have any external MMU info: the kernel page
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* tables contain all the necessary information.
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*/
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#define update_mmu_cache(vma, address, pte) do { } while (0)
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#endif /* !__ASSEMBLY__ */
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/*
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* kern_addr_valid() is (1) for FLATMEM and (0) for
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* SPARSEMEM and DISCONTIGMEM
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*/
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#ifdef CONFIG_FLATMEM
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#define kern_addr_valid(addr) (1)
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#else
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#define kern_addr_valid(kaddr) (0)
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#endif
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#endif /* _ASM_X86_PGTABLE_32_H */
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