3c86882341
Intel recommends to first flush the TLBs and then the caches on caching attribute changes. c_p_a() previously did it the other way round. Reorder that. The procedure is still not fully compliant to the Intel documentation because Intel recommends a all CPU synchronization step between the TLB flushes and the cache flushes. However on all new Intel CPUs this is now meaningless anyways because they support Self-Snoop and can skip the cache flush step anyway. [ mingo@elte.hu: decoupled from clflush and ported it to x86.git ] Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
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discontig_32.c | ||
extable.c | ||
fault_32.c | ||
fault_64.c | ||
highmem_32.c | ||
hugetlbpage.c | ||
init_32.c | ||
init_64.c | ||
ioremap_32.c | ||
ioremap_64.c | ||
k8topology_64.c | ||
Makefile | ||
Makefile_32 | ||
Makefile_64 | ||
mmap.c | ||
numa_64.c | ||
pageattr_32.c | ||
pageattr_64.c | ||
pageattr-test.c | ||
pgtable_32.c | ||
srat_64.c |