b5e89ed53e
I've been threatening this for a while, so no point hanging around. This lindents the DRM code which was always really bad in tabbing department. I've also fixed some misnamed files in comments and removed some trailing whitespace. Signed-off-by: Dave Airlie <airlied@linux.ie>
380 lines
14 KiB
C
380 lines
14 KiB
C
/* $Id: ffb_drv.h,v 1.1 2000/06/01 04:24:39 davem Exp $
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* ffb_drv.h: Creator/Creator3D direct rendering driver.
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*
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* Copyright (C) 2000 David S. Miller (davem@redhat.com)
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*/
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/* Auxilliary clips. */
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typedef struct {
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volatile unsigned int min;
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volatile unsigned int max;
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} ffb_auxclip, *ffb_auxclipPtr;
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/* FFB register set. */
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typedef struct _ffb_fbc {
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/* Next vertex registers, on the right we list which drawops
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* use said register and the logical name the register has in
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* that context.
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*//* DESCRIPTION DRAWOP(NAME) */
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/*0x00*/ unsigned int pad1[3];
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/* Reserved */
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/*0x0c*/ volatile unsigned int alpha;
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/* ALPHA Transparency */
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/*0x10*/ volatile unsigned int red;
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/* RED */
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/*0x14*/ volatile unsigned int green;
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/* GREEN */
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/*0x18*/ volatile unsigned int blue;
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/* BLUE */
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/*0x1c*/ volatile unsigned int z;
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/* DEPTH */
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/*0x20*/ volatile unsigned int y;
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/* Y triangle(DOYF) */
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/* aadot(DYF) */
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/* ddline(DYF) */
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/* aaline(DYF) */
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/*0x24*/ volatile unsigned int x;
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/* X triangle(DOXF) */
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/* aadot(DXF) */
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/* ddline(DXF) */
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/* aaline(DXF) */
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/*0x28*/ unsigned int pad2[2];
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/* Reserved */
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/*0x30*/ volatile unsigned int ryf;
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/* Y (alias to DOYF) ddline(RYF) */
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/* aaline(RYF) */
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/* triangle(RYF) */
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/*0x34*/ volatile unsigned int rxf;
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/* X ddline(RXF) */
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/* aaline(RXF) */
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/* triangle(RXF) */
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/*0x38*/ unsigned int pad3[2];
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/* Reserved */
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/*0x40*/ volatile unsigned int dmyf;
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/* Y (alias to DOYF) triangle(DMYF) */
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/*0x44*/ volatile unsigned int dmxf;
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/* X triangle(DMXF) */
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/*0x48*/ unsigned int pad4[2];
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/* Reserved */
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/*0x50*/ volatile unsigned int ebyi;
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/* Y (alias to RYI) polygon(EBYI) */
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/*0x54*/ volatile unsigned int ebxi;
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/* X polygon(EBXI) */
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/*0x58*/ unsigned int pad5[2];
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/* Reserved */
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/*0x60*/ volatile unsigned int by;
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/* Y brline(RYI) */
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/* fastfill(OP) */
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/* polygon(YI) */
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/* rectangle(YI) */
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/* bcopy(SRCY) */
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/* vscroll(SRCY) */
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/*0x64*/ volatile unsigned int bx;
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/* X brline(RXI) */
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/* polygon(XI) */
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/* rectangle(XI) */
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/* bcopy(SRCX) */
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/* vscroll(SRCX) */
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/* fastfill(GO) */
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/*0x68*/ volatile unsigned int dy;
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/* destination Y fastfill(DSTY) */
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/* bcopy(DSRY) */
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/* vscroll(DSRY) */
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/*0x6c*/ volatile unsigned int dx;
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/* destination X fastfill(DSTX) */
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/* bcopy(DSTX) */
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/* vscroll(DSTX) */
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/*0x70*/ volatile unsigned int bh;
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/* Y (alias to RYI) brline(DYI) */
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/* dot(DYI) */
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/* polygon(ETYI) */
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/* Height fastfill(H) */
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/* bcopy(H) */
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/* vscroll(H) */
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/* Y count fastfill(NY) */
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/*0x74*/ volatile unsigned int bw;
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/* X dot(DXI) */
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/* brline(DXI) */
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/* polygon(ETXI) */
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/* fastfill(W) */
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/* bcopy(W) */
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/* vscroll(W) */
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/* fastfill(NX) */
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/*0x78*/ unsigned int pad6[2];
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/* Reserved */
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/*0x80*/ unsigned int pad7[32];
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/* Reserved */
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/* Setup Unit's vertex state register */
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/*100*/ volatile unsigned int suvtx;
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/*104*/ unsigned int pad8[63];
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/* Reserved */
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/* Frame Buffer Control Registers */
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/*200*/ volatile unsigned int ppc;
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/* Pixel Processor Control */
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/*204*/ volatile unsigned int wid;
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/* Current WID */
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/*208*/ volatile unsigned int fg;
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/* FG data */
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/*20c*/ volatile unsigned int bg;
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/* BG data */
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/*210*/ volatile unsigned int consty;
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/* Constant Y */
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/*214*/ volatile unsigned int constz;
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/* Constant Z */
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/*218*/ volatile unsigned int xclip;
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/* X Clip */
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/*21c*/ volatile unsigned int dcss;
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/* Depth Cue Scale Slope */
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/*220*/ volatile unsigned int vclipmin;
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/* Viewclip XY Min Bounds */
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/*224*/ volatile unsigned int vclipmax;
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/* Viewclip XY Max Bounds */
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/*228*/ volatile unsigned int vclipzmin;
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/* Viewclip Z Min Bounds */
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/*22c*/ volatile unsigned int vclipzmax;
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/* Viewclip Z Max Bounds */
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/*230*/ volatile unsigned int dcsf;
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/* Depth Cue Scale Front Bound */
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/*234*/ volatile unsigned int dcsb;
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/* Depth Cue Scale Back Bound */
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/*238*/ volatile unsigned int dczf;
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/* Depth Cue Z Front */
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/*23c*/ volatile unsigned int dczb;
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/* Depth Cue Z Back */
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/*240*/ unsigned int pad9;
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/* Reserved */
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/*244*/ volatile unsigned int blendc;
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/* Alpha Blend Control */
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/*248*/ volatile unsigned int blendc1;
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/* Alpha Blend Color 1 */
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/*24c*/ volatile unsigned int blendc2;
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/* Alpha Blend Color 2 */
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/*250*/ volatile unsigned int fbramitc;
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/* FB RAM Interleave Test Control */
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/*254*/ volatile unsigned int fbc;
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/* Frame Buffer Control */
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/*258*/ volatile unsigned int rop;
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/* Raster OPeration */
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/*25c*/ volatile unsigned int cmp;
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/* Frame Buffer Compare */
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/*260*/ volatile unsigned int matchab;
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/* Buffer AB Match Mask */
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/*264*/ volatile unsigned int matchc;
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/* Buffer C(YZ) Match Mask */
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/*268*/ volatile unsigned int magnab;
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/* Buffer AB Magnitude Mask */
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/*26c*/ volatile unsigned int magnc;
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/* Buffer C(YZ) Magnitude Mask */
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/*270*/ volatile unsigned int fbcfg0;
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/* Frame Buffer Config 0 */
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/*274*/ volatile unsigned int fbcfg1;
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/* Frame Buffer Config 1 */
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/*278*/ volatile unsigned int fbcfg2;
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/* Frame Buffer Config 2 */
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/*27c*/ volatile unsigned int fbcfg3;
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/* Frame Buffer Config 3 */
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/*280*/ volatile unsigned int ppcfg;
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/* Pixel Processor Config */
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/*284*/ volatile unsigned int pick;
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/* Picking Control */
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/*288*/ volatile unsigned int fillmode;
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/* FillMode */
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/*28c*/ volatile unsigned int fbramwac;
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/* FB RAM Write Address Control */
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/*290*/ volatile unsigned int pmask;
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/* RGB PlaneMask */
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/*294*/ volatile unsigned int xpmask;
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/* X PlaneMask */
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/*298*/ volatile unsigned int ypmask;
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/* Y PlaneMask */
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/*29c*/ volatile unsigned int zpmask;
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/* Z PlaneMask */
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/*2a0*/ ffb_auxclip auxclip[4];
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/* Auxilliary Viewport Clip */
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/* New 3dRAM III support regs */
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/*2c0*/ volatile unsigned int rawblend2;
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/*2c4*/ volatile unsigned int rawpreblend;
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/*2c8*/ volatile unsigned int rawstencil;
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/*2cc*/ volatile unsigned int rawstencilctl;
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/*2d0*/ volatile unsigned int threedram1;
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/*2d4*/ volatile unsigned int threedram2;
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/*2d8*/ volatile unsigned int passin;
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/*2dc*/ volatile unsigned int rawclrdepth;
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/*2e0*/ volatile unsigned int rawpmask;
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/*2e4*/ volatile unsigned int rawcsrc;
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/*2e8*/ volatile unsigned int rawmatch;
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/*2ec*/ volatile unsigned int rawmagn;
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/*2f0*/ volatile unsigned int rawropblend;
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/*2f4*/ volatile unsigned int rawcmp;
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/*2f8*/ volatile unsigned int rawwac;
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/*2fc*/ volatile unsigned int fbramid;
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/*300*/ volatile unsigned int drawop;
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/* Draw OPeration */
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/*304*/ unsigned int pad10[2];
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/* Reserved */
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/*30c*/ volatile unsigned int lpat;
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/* Line Pattern control */
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/*310*/ unsigned int pad11;
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/* Reserved */
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/*314*/ volatile unsigned int fontxy;
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/* XY Font coordinate */
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/*318*/ volatile unsigned int fontw;
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/* Font Width */
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/*31c*/ volatile unsigned int fontinc;
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/* Font Increment */
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/*320*/ volatile unsigned int font;
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/* Font bits */
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/*324*/ unsigned int pad12[3];
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/* Reserved */
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/*330*/ volatile unsigned int blend2;
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/*334*/ volatile unsigned int preblend;
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/*338*/ volatile unsigned int stencil;
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/*33c*/ volatile unsigned int stencilctl;
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/*340*/ unsigned int pad13[4];
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/* Reserved */
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/*350*/ volatile unsigned int dcss1;
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/* Depth Cue Scale Slope 1 */
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/*354*/ volatile unsigned int dcss2;
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/* Depth Cue Scale Slope 2 */
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/*358*/ volatile unsigned int dcss3;
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/* Depth Cue Scale Slope 3 */
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/*35c*/ volatile unsigned int widpmask;
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/*360*/ volatile unsigned int dcs2;
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/*364*/ volatile unsigned int dcs3;
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/*368*/ volatile unsigned int dcs4;
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/*36c*/ unsigned int pad14;
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/* Reserved */
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/*370*/ volatile unsigned int dcd2;
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/*374*/ volatile unsigned int dcd3;
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/*378*/ volatile unsigned int dcd4;
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/*37c*/ unsigned int pad15;
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/* Reserved */
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/*380*/ volatile unsigned int pattern[32];
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/* area Pattern */
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/*400*/ unsigned int pad16[8];
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/* Reserved */
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/*420*/ volatile unsigned int reset;
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/* chip RESET */
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/*424*/ unsigned int pad17[247];
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/* Reserved */
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/*800*/ volatile unsigned int devid;
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/* Device ID */
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/*804*/ unsigned int pad18[63];
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/* Reserved */
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/*900*/ volatile unsigned int ucsr;
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/* User Control & Status Register */
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/*904*/ unsigned int pad19[31];
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/* Reserved */
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/*980*/ volatile unsigned int mer;
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/* Mode Enable Register */
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/*984*/ unsigned int pad20[1439];
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/* Reserved */
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} ffb_fbc, *ffb_fbcPtr;
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struct ffb_hw_context {
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int is_2d_only;
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unsigned int ppc;
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unsigned int wid;
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unsigned int fg;
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unsigned int bg;
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unsigned int consty;
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unsigned int constz;
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unsigned int xclip;
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unsigned int dcss;
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unsigned int vclipmin;
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unsigned int vclipmax;
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unsigned int vclipzmin;
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unsigned int vclipzmax;
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unsigned int dcsf;
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unsigned int dcsb;
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unsigned int dczf;
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unsigned int dczb;
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unsigned int blendc;
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unsigned int blendc1;
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unsigned int blendc2;
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unsigned int fbc;
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unsigned int rop;
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unsigned int cmp;
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unsigned int matchab;
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unsigned int matchc;
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unsigned int magnab;
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unsigned int magnc;
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unsigned int pmask;
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unsigned int xpmask;
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unsigned int ypmask;
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unsigned int zpmask;
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unsigned int auxclip0min;
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unsigned int auxclip0max;
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unsigned int auxclip1min;
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unsigned int auxclip1max;
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unsigned int auxclip2min;
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unsigned int auxclip2max;
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unsigned int auxclip3min;
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unsigned int auxclip3max;
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unsigned int drawop;
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unsigned int lpat;
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unsigned int fontxy;
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unsigned int fontw;
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unsigned int fontinc;
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unsigned int area_pattern[32];
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unsigned int ucsr;
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unsigned int stencil;
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unsigned int stencilctl;
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unsigned int dcss1;
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unsigned int dcss2;
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unsigned int dcss3;
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unsigned int dcs2;
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unsigned int dcs3;
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unsigned int dcs4;
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unsigned int dcd2;
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unsigned int dcd3;
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unsigned int dcd4;
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unsigned int mer;
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};
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#define FFB_MAX_CTXS 32
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enum ffb_chip_type {
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ffb1_prototype = 0, /* Early pre-FCS FFB */
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ffb1_standard, /* First FCS FFB, 100Mhz UPA, 66MHz gclk */
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ffb1_speedsort, /* Second FCS FFB, 100Mhz UPA, 75MHz gclk */
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ffb2_prototype, /* Early pre-FCS vertical FFB2 */
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ffb2_vertical, /* First FCS FFB2/vertical, 100Mhz UPA, 100MHZ gclk,
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75(SingleBuffer)/83(DoubleBuffer) MHz fclk */
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ffb2_vertical_plus, /* Second FCS FFB2/vertical, same timings */
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ffb2_horizontal, /* First FCS FFB2/horizontal, same timings as FFB2/vert */
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ffb2_horizontal_plus, /* Second FCS FFB2/horizontal, same timings */
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afb_m3, /* FCS Elite3D, 3 float chips */
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afb_m6 /* FCS Elite3D, 6 float chips */
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};
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typedef struct ffb_dev_priv {
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/* Misc software state. */
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int prom_node;
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enum ffb_chip_type ffb_type;
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u64 card_phys_base;
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struct miscdevice miscdev;
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/* Controller registers. */
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ffb_fbcPtr regs;
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/* Context table. */
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struct ffb_hw_context *hw_state[FFB_MAX_CTXS];
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} ffb_dev_priv_t;
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extern unsigned long ffb_get_unmapped_area(struct file *filp,
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unsigned long hint,
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unsigned long len,
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unsigned long pgoff,
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unsigned long flags);
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extern void ffb_set_context_ioctls(void);
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extern drm_ioctl_desc_t DRM(ioctls)[];
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extern int ffb_driver_context_switch(drm_device_t * dev, int old, int new);
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