3e42fefa2f
AQT1000 codec is a hifi headset that supports audio playback and recording on headset. It also supports playback of fractional sampling rates. Audio playback and recording is transferred through I2S interface. Add driver for AQT1000 codec Change-Id: Iba163e9203d67216cdbf87727b06801356a001e3 Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
111 lines
3.0 KiB
C
111 lines
3.0 KiB
C
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/regmap.h>
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#include <linux/device.h>
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#include "aqt1000-registers.h"
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#include "aqt1000-reg-defaults.h"
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#include "aqt1000-internal.h"
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static bool aqt1000_is_readable_register(struct device *dev, unsigned int reg)
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{
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u8 pg_num, reg_offset;
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const u8 *reg_tbl = NULL;
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/*
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* Get the page number from MSB of codec register. If its 0x80, assign
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* the corresponding page index PAGE_0x80.
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*/
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pg_num = reg >> 0x8;
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if (pg_num == 0x80)
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pg_num = AQT1000_PAGE_128;
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else if (pg_num > 15)
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return false;
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reg_tbl = aqt1000_reg[pg_num];
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reg_offset = reg & 0xFF;
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if (reg_tbl && reg_tbl[reg_offset])
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return true;
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else
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return false;
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}
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static bool aqt1000_is_volatile_register(struct device *dev, unsigned int reg)
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{
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u8 pg_num, reg_offset;
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const u8 *reg_tbl = NULL;
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pg_num = reg >> 0x8;
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if (pg_num == 0x80)
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pg_num = AQT1000_PAGE_128;
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else if (pg_num > 15)
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return false;
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reg_tbl = aqt1000_reg[pg_num];
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reg_offset = reg & 0xFF;
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if (reg_tbl && reg_tbl[reg_offset] == AQT1000_RO)
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return true;
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/* IIR Coeff registers are not cacheable */
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if ((reg >= AQT1000_CDC_SIDETONE_IIR0_IIR_COEF_B1_CTL) &&
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(reg <= AQT1000_CDC_SIDETONE_IIR0_IIR_COEF_B2_CTL))
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return true;
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if ((reg >= AQT1000_CDC_ANC0_IIR_COEFF_1_CTL) &&
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(reg <= AQT1000_CDC_ANC0_FB_GAIN_CTL))
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return true;
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if ((reg >= AQT1000_CDC_ANC1_IIR_COEFF_1_CTL) &&
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(reg <= AQT1000_CDC_ANC1_FB_GAIN_CTL))
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return true;
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/*
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* Need to mark volatile for registers that are writable but
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* only few bits are read-only
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*/
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switch (reg) {
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case AQT1000_BUCK_5V_CTRL_CCL_1:
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case AQT1000_BIAS_CCOMP_FINE_ADJ:
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case AQT1000_ANA_BIAS:
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case AQT1000_BUCK_5V_IBIAS_CTL_4:
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case AQT1000_BUCK_5V_CTRL_CCL_2:
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case AQT1000_CHIP_CFG0_RST_CTL:
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case AQT1000_CHIP_CFG0_CLK_CTL_CDC_DIG:
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case AQT1000_CHIP_CFG0_CLK_CFG_MCLK:
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case AQT1000_CHIP_CFG0_EFUSE_CTL:
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case AQT1000_CDC_CLK_RST_CTRL_FS_CNT_CONTROL:
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case AQT1000_CDC_CLK_RST_CTRL_MCLK_CONTROL:
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case AQT1000_ANA_RX_SUPPLIES:
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case AQT1000_ANA_MBHC_MECH:
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case AQT1000_ANA_MBHC_ELECT:
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case AQT1000_ANA_MBHC_ZDET:
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case AQT1000_ANA_MICB1:
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case AQT1000_BUCK_5V_EN_CTL:
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return true;
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}
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return false;
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}
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struct regmap_config aqt1000_regmap_config = {
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.reg_bits = 16,
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.val_bits = 8,
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.cache_type = REGCACHE_RBTREE,
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.reg_defaults = aqt1000_defaults,
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.num_reg_defaults = ARRAY_SIZE(aqt1000_defaults),
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.max_register = AQT1000_MAX_REGISTER,
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.volatile_reg = aqt1000_is_volatile_register,
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.readable_reg = aqt1000_is_readable_register,
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};
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