android_kernel_xiaomi_sm8350/drivers/clk/rockchip
Justin Swartz 4f6815e429 clk: rockchip: fix incorrect configuration of rk3228 aclk_gpu* clocks
commit cec9d101d70a3509da9bd2e601e0b242154ce616 upstream.

The following changes prevent the unrecoverable freezes and rcu_sched
stall warnings experienced in each of my attempts to take advantage of
lima.

Replace the COMPOSITE_NOGATE definition of aclk_gpu_pre with a
COMPOSITE that retains the selection of HDMIPHY as the PLL source, but
instead makes uses of the aclk_gpu PLL source gate and parent names
defined by mux_pll_src_4plls_p rather than mux_aclk_gpu_pre_p.

Remove the now unused mux_aclk_gpu_pre_p and the four named but also
unused definitions (cpll_gpu, gpll_gpu, hdmiphy_gpu and usb480m_gpu)
of the aclk_gpu PLL source gate.

Use the correct gate offset for aclk_gpu and aclk_gpu_noc.

Fixes: 307a2e9ac5 ("clk: rockchip: add clock controller for rk3228")
Cc: stable@vger.kernel.org
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
[double-checked against SoC manual and added fixes tag]
Link: https://lore.kernel.org/r/20200114162503.7548-1-justin.swartz@risingedge.co.za
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-05-20 08:20:35 +02:00
..
clk-cpu.c
clk-ddr.c
clk-half-divider.c
clk-inverter.c
clk-mmc-phase.c
clk-muxgrf.c
clk-pll.c
clk-px30.c
clk-rk3036.c
clk-rk3128.c
clk-rk3188.c
clk-rk3228.c
clk-rk3288.c
clk-rk3308.c
clk-rk3328.c
clk-rk3368.c
clk-rk3399.c
clk-rv1108.c
clk.c
clk.h
Makefile
softrst.c