443448d054
This updates the DRM via driver to the latest CVS version, which contains support for DMA blitting. It also contains some whitespace and other minor fixes From: Thomas Hellstrom <unichrome@shipmail.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
149 lines
4.9 KiB
C
149 lines
4.9 KiB
C
/*
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* Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
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* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _VIA_DRV_H_
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#define _VIA_DRV_H_
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#define DRIVER_AUTHOR "Various"
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#define DRIVER_NAME "via"
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#define DRIVER_DESC "VIA Unichrome / Pro"
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#define DRIVER_DATE "20051116"
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#define DRIVER_MAJOR 2
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#define DRIVER_MINOR 7
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#define DRIVER_PATCHLEVEL 4
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#include "via_verifier.h"
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#include "via_dmablit.h"
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#define VIA_PCI_BUF_SIZE 60000
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#define VIA_FIRE_BUF_SIZE 1024
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#define VIA_NUM_IRQS 4
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typedef struct drm_via_ring_buffer {
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drm_local_map_t map;
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char *virtual_start;
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} drm_via_ring_buffer_t;
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typedef uint32_t maskarray_t[5];
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typedef struct drm_via_irq {
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atomic_t irq_received;
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uint32_t pending_mask;
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uint32_t enable_mask;
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wait_queue_head_t irq_queue;
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} drm_via_irq_t;
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typedef struct drm_via_private {
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drm_via_sarea_t *sarea_priv;
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drm_local_map_t *sarea;
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drm_local_map_t *fb;
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drm_local_map_t *mmio;
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unsigned long agpAddr;
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wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
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char *dma_ptr;
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unsigned int dma_low;
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unsigned int dma_high;
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unsigned int dma_offset;
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uint32_t dma_wrap;
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volatile uint32_t *last_pause_ptr;
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volatile uint32_t *hw_addr_ptr;
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drm_via_ring_buffer_t ring;
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struct timeval last_vblank;
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int last_vblank_valid;
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unsigned usec_per_vblank;
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drm_via_state_t hc_state;
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char pci_buf[VIA_PCI_BUF_SIZE];
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const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
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uint32_t num_fire_offsets;
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int pro_group_a;
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drm_via_irq_t via_irqs[VIA_NUM_IRQS];
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unsigned num_irqs;
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maskarray_t *irq_masks;
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uint32_t irq_enable_mask;
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uint32_t irq_pending_mask;
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int *irq_map;
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drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
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} drm_via_private_t;
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enum via_family {
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VIA_OTHER = 0,
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VIA_PRO_GROUP_A,
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};
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/* VIA MMIO register access */
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#define VIA_BASE ((dev_priv->mmio))
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#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg)
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#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val)
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#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
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#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val)
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extern drm_ioctl_desc_t via_ioctls[];
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extern int via_max_ioctl;
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extern int via_fb_init(DRM_IOCTL_ARGS);
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extern int via_mem_alloc(DRM_IOCTL_ARGS);
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extern int via_mem_free(DRM_IOCTL_ARGS);
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extern int via_agp_init(DRM_IOCTL_ARGS);
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extern int via_map_init(DRM_IOCTL_ARGS);
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extern int via_decoder_futex(DRM_IOCTL_ARGS);
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extern int via_dma_init(DRM_IOCTL_ARGS);
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extern int via_cmdbuffer(DRM_IOCTL_ARGS);
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extern int via_flush_ioctl(DRM_IOCTL_ARGS);
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extern int via_pci_cmdbuffer(DRM_IOCTL_ARGS);
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extern int via_cmdbuf_size(DRM_IOCTL_ARGS);
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extern int via_wait_irq(DRM_IOCTL_ARGS);
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extern int via_dma_blit_sync( DRM_IOCTL_ARGS );
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extern int via_dma_blit( DRM_IOCTL_ARGS );
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extern int via_driver_load(drm_device_t *dev, unsigned long chipset);
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extern int via_driver_unload(drm_device_t *dev);
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extern int via_init_context(drm_device_t * dev, int context);
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extern int via_final_context(drm_device_t * dev, int context);
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extern int via_do_cleanup_map(drm_device_t * dev);
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extern int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
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extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
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extern void via_driver_irq_preinstall(drm_device_t * dev);
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extern void via_driver_irq_postinstall(drm_device_t * dev);
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extern void via_driver_irq_uninstall(drm_device_t * dev);
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extern int via_dma_cleanup(drm_device_t * dev);
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extern void via_init_command_verifier(void);
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extern int via_driver_dma_quiescent(drm_device_t * dev);
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extern void via_init_futex(drm_via_private_t * dev_priv);
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extern void via_cleanup_futex(drm_via_private_t * dev_priv);
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extern void via_release_futex(drm_via_private_t * dev_priv, int context);
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extern int via_driver_irq_wait(drm_device_t * dev, unsigned int irq,
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int force_sequence, unsigned int *sequence);
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extern void via_dmablit_handler(drm_device_t *dev, int engine, int from_irq);
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extern void via_init_dmablit(drm_device_t *dev);
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#endif
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