Codrin Ciubotariu e46ce5a8ab clk: at91: clk-generated: Limit the requested rate to our range ... [ Upstream commit af7651e67b9d5f7e63ea23b118e3672ac662244a ] On clk_generated_determine_rate(), the requested rate could be outside of clk's range. Limit the rate to the clock's range to not return an error. Fixes: df70aeef60 ("clk: at91: add generated clock driver") Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20210707131213.3283509-1-codrin.ciubotariu@microchip.com Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-09-22 12:26:25 +02:00
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actions	clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC	2021-07-14 16:53:34 +02:00
analogbits
at91	clk: at91: clk-generated: Limit the requested rate to our range	2021-09-22 12:26:25 +02:00
axis
axs10x
bcm
berlin
davinci
h8300
hisilicon
imgtec
imx
ingenic	clk: ingenic: Fix divider calculation with div tables	2020-12-30 11:51:45 +01:00
keystone
loongson1
mediatek
meson	clk: meson: g12a: fix gp0 and hifi ranges	2021-07-14 16:53:26 +02:00
microchip
mmp
mvebu	clk: kirkwood: Fix a clocking boot regression	2021-09-15 09:47:41 +02:00
mxs
nxp
pistachio
pxa
qcom	clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE	2021-05-14 09:44:25 +02:00
renesas	clk: renesas: r8a77995: Add ZA2 clock	2021-07-19 08:53:09 +02:00
rockchip
samsung	clk: exynos7: Mark aclk_fsys1_200 as critical	2021-05-19 10:08:33 +02:00
sifive
sirf
socfpga	clk: socfpga: arria10: Fix memory leak of socfpga_clk on error return	2021-05-11 14:04:10 +02:00
spear
sprd
st
sunxi
sunxi-ng	clk: sunxi-ng: h6: Fix clock divider range on some clocks	2021-03-04 10:26:29 +01:00
tegra	clk: tegra: Ensure that PLLU configuration is applied properly	2021-07-19 08:53:09 +02:00
ti	clocksource/drivers/timer-ti-dm: Handle dra7 timer wrap errata i940	2021-06-23 14:41:31 +02:00
uniphier	clk: uniphier: Fix potential infinite loop	2021-05-14 09:44:25 +02:00
ux500
versatile
x86
zte
zynq
zynqmp	clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback	2021-05-14 09:44:24 +02:00
clk-asm9260.c
clk-aspeed.c
clk-aspeed.h
clk-ast2600.c	media: aspeed: fix clock handling logic	2021-05-14 09:44:23 +02:00
clk-axi-clkgen.c
clk-axm5516.c
clk-bd718x7.c
clk-bulk.c
clk-cdce706.c
clk-cdce925.c
clk-clps711x.c
clk-composite.c
clk-conf.c
clk-cs2000-cp.c
clk-devres.c	clk: fix leak on devm_clk_bulk_get_all() unwind	2021-08-12 13:21:00 +02:00
clk-divider.c
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-mmio.c
clk-fixed-rate.c
clk-fractional-divider.c
clk-gate.c
clk-gemini.c
clk-gpio.c
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c
clk-lochnagar.c
clk-max9485.c
clk-max77686.c
clk-milbeaut.c
clk-moxart.c
clk-multiplier.c
clk-mux.c
clk-nomadik.c
clk-npcm7xx.c
clk-nspire.c
clk-oxnas.c
clk-palmas.c
clk-pwm.c
clk-qoriq.c
clk-rk808.c
clk-s2mps11.c	clk: s2mps11: Fix a resource leak in error handling paths in the probe function	2020-12-30 11:51:29 +01:00
clk-scmi.c
clk-scpi.c
clk-si514.c
clk-si544.c
clk-si570.c
clk-si5341.c	clk: si5341: Update initialization magic	2021-07-14 16:53:35 +02:00
clk-si5351.c
clk-si5351.h
clk-stm32f4.c	clk: stm32f4: fix post divisor setup for I2S/SAI PLLs	2021-08-12 13:20:55 +02:00
clk-stm32h7.c
clk-stm32mp1.c
clk-tango4.c
clk-twl6040.c
clk-u300.c
clk-versaclock5.c
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c	clk: fix invalid usage of list cursor in unregister	2021-04-14 08:24:17 +02:00
clk.h
clkdev.c
Kconfig
Makefile