476f5779b7
The Freescale PCI-e controllers have an issue in that they use the PCI_PRIMARY_BUS register in the virtual P2P bridge to determine which bus number to match on when generating a type 0 config cycle. The issue is if we are renumbering bus numbers to match Linux we will try setting the PCI_PRIMARY_BUS and will not know which bus number to use for generating type 0 config cycles. We surpress writing the register in the P2P bridge and always keep it at zero. In the future when proper PCI domain support is working we should be able to remove this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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.. | ||
qe_lib | ||
commproc.c | ||
cpm2_common.c | ||
cpm2_pic.c | ||
cpm2_pic.h | ||
dart_iommu.c | ||
dart.h | ||
dcr-low.S | ||
dcr.c | ||
fsl_pcie.h | ||
fsl_soc.c | ||
fsl_soc.h | ||
grackle.c | ||
i8259.c | ||
indirect_pci.c | ||
ipic.c | ||
ipic.h | ||
Makefile | ||
micropatch.c | ||
mmio_nvram.c | ||
mpc8xx_pic.c | ||
mpc8xx_pic.h | ||
mpic_msi.c | ||
mpic_u3msi.c | ||
mpic.c | ||
mpic.h | ||
mv64x60_dev.c | ||
mv64x60_pci.c | ||
mv64x60_pic.c | ||
mv64x60.h | ||
pmi.c | ||
timer.c | ||
tsi108_dev.c | ||
tsi108_pci.c | ||
uic.c |