android_kernel_xiaomi_sm8350/include/asm-sh/cpu-sh2a/cache.h
Paul Mundt 3ee7702903 sh: CCR1->CCR renaming for SH-2 parts.
Avoid namespace collision with a CCR1 definition. The general
SH code always expects CCR anyways, so there's no point in keeping
the CCR1 naming around.

Fixes up synclink collisions:

drivers/char/pcmcia/synclink_cs.c:283:1: warning: "CCR1" redefined
In file included from include/asm/cache.h:13,
                 from include/asm/processor_32.h:15,
                 from include/asm/processor.h:60,
                 from include/linux/prefetch.h:14,
                 from include/linux/list.h:8,
                 from include/linux/module.h:9,
                 from drivers/char/pcmcia/synclink_cs.c:38:
include/asm/cpu/cache.h:21:1: warning: this is the location of the previous definition

Reported-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-01-28 13:18:58 +09:00

41 lines
1.0 KiB
C

/*
* include/asm-sh/cpu-sh2a/cache.h
*
* Copyright (C) 2004 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#ifndef __ASM_CPU_SH2A_CACHE_H
#define __ASM_CPU_SH2A_CACHE_H
#define L1_CACHE_SHIFT 4
#define SH_CACHE_VALID 1
#define SH_CACHE_UPDATED 2
#define SH_CACHE_COMBINED 4
#define SH_CACHE_ASSOC 8
#define CCR 0xfffc1000 /* CCR1 */
#define CCR2 0xfffc1004
/*
* Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
* listed here are reserved.
*/
#define CCR_CACHE_CB 0x0000 /* Hack */
#define CCR_CACHE_OCE 0x0001
#define CCR_CACHE_WT 0x0002
#define CCR_CACHE_OCI 0x0008 /* OCF */
#define CCR_CACHE_ICE 0x0100
#define CCR_CACHE_ICI 0x0800 /* ICF */
#define CACHE_IC_ADDRESS_ARRAY 0xf0000000
#define CACHE_OC_ADDRESS_ARRAY 0xf0800000
#define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE)
#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI)
#endif /* __ASM_CPU_SH2A_CACHE_H */