5f97f7f940
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
37 lines
1.4 KiB
C
37 lines
1.4 KiB
C
/*
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* include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h
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*
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* Copyright (C) 2005 Ivan Kokshaysky
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* Copyright (C) SAN People
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*
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* Peripheral Data Controller (PDC) registers.
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* Based on AT91RM9200 datasheet revision E.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef AT91RM9200_PDC_H
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#define AT91RM9200_PDC_H
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#define AT91_PDC_RPR 0x100 /* Receive Pointer Register */
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#define AT91_PDC_RCR 0x104 /* Receive Counter Register */
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#define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */
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#define AT91_PDC_TCR 0x10c /* Transmit Counter Register */
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#define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */
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#define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */
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#define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */
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#define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */
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#define AT91_PDC_PTCR 0x120 /* Transfer Control Register */
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#define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */
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#define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */
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#define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */
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#define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */
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#define AT91_PDC_PTSR 0x124 /* Transfer Status Register */
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#endif
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