5f526d1467
If serial port 2 is used, select it in R_GEN_CONFIG. If serial port 2 is used, setup the control registers for the port. This is done to avoid a pulse on the TXD line during start up, which could disturb some units. Also, remove useless CVS id and log.
731 lines
23 KiB
ArmAsm
731 lines
23 KiB
ArmAsm
/*
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* Head of the kernel - alter with care
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*
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* Copyright (C) 2000, 2001 Axis Communications AB
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*
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* Authors: Bjorn Wesen (bjornw@axis.com)
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*
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*/
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#define ASSEMBLER_MACROS_ONLY
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/* The IO_* macros use the ## token concatenation operator, so
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-traditional must not be used when assembling this file. */
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#include <asm/arch/sv_addr_ag.h>
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#define CRAMFS_MAGIC 0x28cd3d45
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#define RAM_INIT_MAGIC 0x56902387
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#define COMMAND_LINE_MAGIC 0x87109563
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#define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
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IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
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;; exported symbols
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.globl etrax_irv
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.globl romfs_start
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.globl romfs_length
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.globl romfs_in_flash
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.globl swapper_pg_dir
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.text
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;; This is the entry point of the kernel. We are in supervisor mode.
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;; 0x00000000 if Flash, 0x40004000 if DRAM
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;; since etrax actually starts at address 2 when booting from flash, we
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;; put a nop (2 bytes) here first so we dont accidentally skip the di
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;;
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;; NOTICE! The registers r8 and r9 are used as parameters carrying
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;; information from the decompressor (if the kernel was compressed).
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;; They should not be used in the code below until read.
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nop
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di
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;; First setup the kseg_c mapping from where the kernel is linked
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;; to 0x40000000 (where the actual DRAM resides) otherwise
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;; we cannot do very much! See arch/cris/README.mm
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;;
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;; Notice that since we're potentially running at 0x00 or 0x40 right now,
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;; we will get a fault as soon as we enable the MMU if we dont
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;; temporarily map those segments linearily.
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;;
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;; Due to a bug in Etrax-100 LX version 1 we need to map the memory
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;; slightly different. The bug is that you can't remap bit 31 of
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;; an address. Though we can check the version register for
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;; whether the bug is present, some constants would then have to
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;; be variables, so we don't. The drawback is that you can "only" map
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;; 1G per process with CONFIG_CRIS_LOW_MAP.
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#ifdef CONFIG_CRIS_LOW_MAP
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; kseg mappings, temporary map of 0xc0->0x40
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move.d IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
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| IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb) \
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| IO_FIELD (R_MMU_KBASE_HI, base_9, 9) \
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| IO_FIELD (R_MMU_KBASE_HI, base_8, 8), $r0
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move.d $r0, [R_MMU_KBASE_HI]
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; temporary map of 0x40->0x40 and 0x60->0x40
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move.d IO_FIELD (R_MMU_KBASE_LO, base_6, 4) \
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| IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
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move.d $r0, [R_MMU_KBASE_LO]
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; mmu enable, segs e,c,b,a,6,5,4,0 segment mapped
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move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
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| IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
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| IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
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| IO_STATE (R_MMU_CONFIG, we_excp, enable) \
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| IO_STATE (R_MMU_CONFIG, seg_f, page) \
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| IO_STATE (R_MMU_CONFIG, seg_e, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_d, page) \
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| IO_STATE (R_MMU_CONFIG, seg_c, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_b, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_a, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_9, page) \
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| IO_STATE (R_MMU_CONFIG, seg_8, page) \
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| IO_STATE (R_MMU_CONFIG, seg_7, page) \
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| IO_STATE (R_MMU_CONFIG, seg_6, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_5, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_4, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_3, page) \
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| IO_STATE (R_MMU_CONFIG, seg_2, page) \
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| IO_STATE (R_MMU_CONFIG, seg_1, page) \
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| IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
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move.d $r0, [R_MMU_CONFIG]
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#else
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; kseg mappings
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move.d IO_FIELD (R_MMU_KBASE_HI, base_e, 8) \
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| IO_FIELD (R_MMU_KBASE_HI, base_c, 4) \
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| IO_FIELD (R_MMU_KBASE_HI, base_b, 0xb), $r0
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move.d $r0, [R_MMU_KBASE_HI]
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; temporary map of 0x40->0x40 and 0x00->0x00
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move.d IO_FIELD (R_MMU_KBASE_LO, base_4, 4), $r0
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move.d $r0, [R_MMU_KBASE_LO]
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; mmu enable, segs f,e,c,b,4,0 segment mapped
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move.d IO_STATE (R_MMU_CONFIG, mmu_enable, enable) \
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| IO_STATE (R_MMU_CONFIG, inv_excp, enable) \
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| IO_STATE (R_MMU_CONFIG, acc_excp, enable) \
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| IO_STATE (R_MMU_CONFIG, we_excp, enable) \
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| IO_STATE (R_MMU_CONFIG, seg_f, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_e, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_d, page) \
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| IO_STATE (R_MMU_CONFIG, seg_c, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_b, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_a, page) \
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| IO_STATE (R_MMU_CONFIG, seg_9, page) \
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| IO_STATE (R_MMU_CONFIG, seg_8, page) \
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| IO_STATE (R_MMU_CONFIG, seg_7, page) \
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| IO_STATE (R_MMU_CONFIG, seg_6, page) \
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| IO_STATE (R_MMU_CONFIG, seg_5, page) \
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| IO_STATE (R_MMU_CONFIG, seg_4, seg) \
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| IO_STATE (R_MMU_CONFIG, seg_3, page) \
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| IO_STATE (R_MMU_CONFIG, seg_2, page) \
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| IO_STATE (R_MMU_CONFIG, seg_1, page) \
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| IO_STATE (R_MMU_CONFIG, seg_0, seg), $r0
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move.d $r0, [R_MMU_CONFIG]
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#endif
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;; Now we need to sort out the segments and their locations in RAM or
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;; Flash. The image in the Flash (or in DRAM) consists of 3 pieces:
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;; 1) kernel text, 2) kernel data, 3) ROM filesystem image
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;; But the linker has linked the kernel to expect this layout in
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;; DRAM memory:
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;; 1) kernel text, 2) kernel data, 3) kernel BSS
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;; (the location of the ROM filesystem is determined by the krom driver)
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;; If we boot this from Flash, we want to keep the ROM filesystem in
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;; the flash, we want to copy the text and need to copy the data to DRAM.
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;; But if we boot from DRAM, we need to move the ROMFS image
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;; from its position after kernel data, to after kernel BSS, BEFORE the
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;; kernel starts using the BSS area (since its "overlayed" with the ROMFS)
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;;
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;; In both cases, we start in un-cached mode, and need to jump into a
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;; cached PC after we're done fiddling around with the segments.
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;;
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;; arch/etrax100/etrax100.ld sets some symbols that define the start
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;; and end of each segment.
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;; Check if we start from DRAM or FLASH by testing PC
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move.d $pc,$r0
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and.d 0x7fffffff,$r0 ; get rid of the non-cache bit
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cmp.d 0x10000,$r0 ; arbitrary... just something above this code
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blo _inflash0
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nop
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jump _inram ; enter cached ram
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;; Jumpgate for branches.
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_inflash0:
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jump _inflash
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;; Put this in a suitable section where we can reclaim storage
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;; after init.
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.section ".init.text", "ax"
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_inflash:
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#ifdef CONFIG_ETRAX_ETHERNET
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;; Start MII clock to make sure it is running when tranceiver is reset
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move.d START_ETHERNET_CLOCK, $r0
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move.d $r0, [R_NETWORK_GEN_CONFIG]
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#endif
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;; Set up waitstates etc according to kernel configuration.
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#ifndef CONFIG_SVINTO_SIM
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move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
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move.d $r0, [R_WAITSTATES]
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move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
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move.d $r0, [R_BUS_CONFIG]
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#endif
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;; We need to initialze DRAM registers before we start using the DRAM
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cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
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beq _dram_init_finished
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nop
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#include "../lib/dram_init.S"
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_dram_init_finished:
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;; Copy text+data to DRAM
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;; This is fragile - the calculation of r4 as the image size depends
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;; on that the labels below actually are the first and last positions
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;; in the linker-script.
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;;
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;; Then the locating of the cramfs image depends on the aforementioned
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;; image being located in the flash at 0. This is most often not true,
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;; thus the following does not work (normally there is a rescue-block
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;; between the physical start of the flash and the flash-image start,
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;; and when run with compression, the kernel is actually unpacked to
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;; DRAM and we never get here in the first place :))
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moveq 0, $r0 ; source
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move.d text_start, $r1 ; destination
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move.d __vmlinux_end, $r2 ; end destination
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move.d $r2, $r4
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sub.d $r1, $r4 ; r4=__vmlinux_end in flash, used below
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1: move.w [$r0+], $r3
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move.w $r3, [$r1+]
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cmp.d $r2, $r1
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blo 1b
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nop
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;; We keep the cramfs in the flash.
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;; There might be none, but that does not matter because
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;; we don't do anything than read some bytes here.
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moveq 0, $r0
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move.d $r0, [romfs_length] ; default if there is no cramfs
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move.d [$r4], $r0 ; cramfs_super.magic
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cmp.d CRAMFS_MAGIC, $r0
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bne 1f
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nop
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move.d [$r4 + 4], $r0 ; cramfs_super.size
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move.d $r0, [romfs_length]
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#ifdef CONFIG_CRIS_LOW_MAP
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add.d 0x50000000, $r4 ; add flash start in virtual memory (cached)
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#else
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add.d 0xf0000000, $r4 ; add flash start in virtual memory (cached)
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#endif
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move.d $r4, [romfs_start]
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1:
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moveq 1, $r0
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move.d $r0, [romfs_in_flash]
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jump _start_it ; enter code, cached this time
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_inram:
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;; Move the ROM fs to after BSS end. This assumes that the cramfs
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;; second longword contains the length of the cramfs
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moveq 0, $r0
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move.d $r0, [romfs_length] ; default if there is no cramfs
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;; The kernel could have been unpacked to DRAM by the loader, but
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;; the cramfs image could still be in the Flash directly after the
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;; compressed kernel image. The loader passes the address of the
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;; byte succeeding the last compressed byte in the flash in the
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;; register r9 when starting the kernel. Check if r9 points to a
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;; decent cramfs image!
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;; (Notice that if this is not booted from the loader, r9 will be
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;; garbage but we do sanity checks on it, the chance that it points
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;; to a cramfs magic is small.. )
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cmp.d 0x0ffffff8, $r9
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bhs _no_romfs_in_flash ; r9 points outside the flash area
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nop
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move.d [$r9], $r0 ; cramfs_super.magic
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cmp.d CRAMFS_MAGIC, $r0
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bne _no_romfs_in_flash
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nop
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move.d [$r9+4], $r0 ; cramfs_super.length
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move.d $r0, [romfs_length]
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#ifdef CONFIG_CRIS_LOW_MAP
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add.d 0x50000000, $r9 ; add flash start in virtual memory (cached)
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#else
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add.d 0xf0000000, $r9 ; add flash start in virtual memory (cached)
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#endif
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move.d $r9, [romfs_start]
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moveq 1, $r0
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move.d $r0, [romfs_in_flash]
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jump _start_it ; enter code, cached this time
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_no_romfs_in_flash:
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;; Check if there is a cramfs (magic value).
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;; Notice that we check for cramfs magic value - which is
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;; the "rom fs" we'll possibly use in 2.4 if not JFFS (which does
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;; not need this mechanism anyway)
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move.d __vmlinux_end, $r0; the image will be after the vmlinux end address
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move.d [$r0], $r1 ; cramfs assumes same endian on host/target
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cmp.d CRAMFS_MAGIC, $r1; magic value in cramfs superblock
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bne 2f
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nop
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;; Ok. What is its size ?
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move.d [$r0 + 4], $r2 ; cramfs_super.size (again, no need to swapwb)
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;; We want to copy it to the end of the BSS
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move.d _end, $r1
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;; Remember values so cramfs and setup can find this info
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move.d $r1, [romfs_start] ; new romfs location
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move.d $r2, [romfs_length]
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;; We need to copy it backwards, since they can be overlapping
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add.d $r2, $r0
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add.d $r2, $r1
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;; Go ahead. Make my loop.
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lsrq 1, $r2 ; size is in bytes, we copy words
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1: move.w [$r0=$r0-2],$r3
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move.w $r3,[$r1=$r1-2]
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subq 1, $r2
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bne 1b
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nop
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2:
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;; Dont worry that the BSS is tainted. It will be cleared later.
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moveq 0, $r0
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move.d $r0, [romfs_in_flash]
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jump _start_it ; better skip the additional cramfs check below
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_start_it:
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;; Check if kernel command line is supplied
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cmp.d COMMAND_LINE_MAGIC, $r10
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bne no_command_line
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nop
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move.d 256, $r13
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move.d cris_command_line, $r10
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or.d 0x80000000, $r11 ; Make it virtual
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1:
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move.b [$r11+], $r12
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move.b $r12, [$r10+]
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subq 1, $r13
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bne 1b
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nop
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no_command_line:
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;; the kernel stack is overlayed with the task structure for each
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;; task. thus the initial kernel stack is in the same page as the
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;; init_task (but starts in the top of the page, size 8192)
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move.d init_thread_union + 8192, $sp
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move.d ibr_start,$r0 ; this symbol is set by the linker script
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move $r0,$ibr
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move.d $r0,[etrax_irv] ; set the interrupt base register and pointer
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;; Clear BSS region, from _bss_start to _end
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move.d __bss_start, $r0
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move.d _end, $r1
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1: clear.d [$r0+]
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cmp.d $r1, $r0
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blo 1b
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nop
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#ifdef CONFIG_BLK_DEV_ETRAXIDE
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;; disable ATA before enabling it in genconfig below
|
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moveq 0,$r0
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move.d $r0,[R_ATA_CTRL_DATA]
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move.d $r0,[R_ATA_TRANSFER_CNT]
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move.d $r0,[R_ATA_CONFIG]
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#if 0
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move.d R_PORT_G_DATA, $r1
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move.d $r0, [$r1]; assert ATA bus-reset
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nop
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nop
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nop
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nop
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nop
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nop
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move.d 0x08000000,$r0
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move.d $r0,[$r1]
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#endif
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#endif
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|
|
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#ifdef CONFIG_JULIETTE
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;; configure external DMA channel 0 before enabling it in genconfig
|
|
|
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moveq 0,$r0
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move.d $r0,[R_EXT_DMA_0_ADDR]
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; cnt enable, word size, output, stop, size 0
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move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \
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| IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \
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| IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \
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| IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \
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| IO_STATE (R_EXT_DMA_0_CMD, wid, word) \
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| IO_STATE (R_EXT_DMA_0_CMD, dir, output) \
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| IO_STATE (R_EXT_DMA_0_CMD, run, stop) \
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| IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0
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move.d $r0,[R_EXT_DMA_0_CMD]
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|
|
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;; reset dma4 and wait for completion
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|
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moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
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move.b $r0,[R_DMA_CH4_CMD]
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1: move.b [R_DMA_CH4_CMD],$r0
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and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0
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cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0
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beq 1b
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nop
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|
|
|
;; reset dma5 and wait for completion
|
|
|
|
moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
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move.b $r0,[R_DMA_CH5_CMD]
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1: move.b [R_DMA_CH5_CMD],$r0
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and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0
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cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0
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beq 1b
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nop
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#endif
|
|
|
|
;; Etrax product HW genconfig setup
|
|
|
|
moveq 0,$r0
|
|
|
|
;; Select or disable serial port 2
|
|
#ifdef CONFIG_ETRAX_SERIAL_PORT2
|
|
or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
|
|
#else
|
|
or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
|
|
#endif
|
|
|
|
;; Init interfaces (disable them).
|
|
or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, ata, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, par0, disable) \
|
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| IO_STATE (R_GEN_CONFIG, mio, disable) \
|
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| IO_STATE (R_GEN_CONFIG, scsi1, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, par1, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, ser3, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, mio_w, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, usb1, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, usb2, disable) \
|
|
| IO_STATE (R_GEN_CONFIG, par_w, disable),$r0
|
|
|
|
;; Init DMA channel muxing (set to unused clients).
|
|
or.d IO_STATE (R_GEN_CONFIG, dma2, ata) \
|
|
| IO_STATE (R_GEN_CONFIG, dma3, ata) \
|
|
| IO_STATE (R_GEN_CONFIG, dma4, scsi1) \
|
|
| IO_STATE (R_GEN_CONFIG, dma5, scsi1) \
|
|
| IO_STATE (R_GEN_CONFIG, dma6, unused) \
|
|
| IO_STATE (R_GEN_CONFIG, dma7, unused) \
|
|
| IO_STATE (R_GEN_CONFIG, dma8, usb) \
|
|
| IO_STATE (R_GEN_CONFIG, dma9, usb),$r0
|
|
|
|
|
|
#if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT)
|
|
or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0
|
|
#endif
|
|
|
|
#if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT)
|
|
or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0
|
|
#endif
|
|
#if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT)
|
|
or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0
|
|
#endif
|
|
|
|
#if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT)
|
|
or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0
|
|
#endif
|
|
|
|
move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG
|
|
|
|
#ifndef CONFIG_SVINTO_SIM
|
|
move.d $r0,[R_GEN_CONFIG]
|
|
|
|
#if 0
|
|
moveq 4,$r0
|
|
move.b $r0,[R_DMA_CH6_CMD] ; reset (ser0 dma out)
|
|
move.b $r0,[R_DMA_CH7_CMD] ; reset (ser0 dma in)
|
|
1: move.b [R_DMA_CH6_CMD],$r0 ; wait for reset cycle to finish
|
|
and.b 7,$r0
|
|
cmp.b 4,$r0
|
|
beq 1b
|
|
nop
|
|
1: move.b [R_DMA_CH7_CMD],$r0 ; wait for reset cycle to finish
|
|
and.b 7,$r0
|
|
cmp.b 4,$r0
|
|
beq 1b
|
|
nop
|
|
#endif
|
|
|
|
moveq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
|
|
move.b $r0,[R_DMA_CH8_CMD] ; reset (ser1 dma out)
|
|
move.b $r0,[R_DMA_CH9_CMD] ; reset (ser1 dma in)
|
|
1: move.b [R_DMA_CH8_CMD],$r0 ; wait for reset cycle to finish
|
|
andq IO_MASK (R_DMA_CH8_CMD, cmd),$r0
|
|
cmpq IO_STATE (R_DMA_CH8_CMD, cmd, reset),$r0
|
|
beq 1b
|
|
nop
|
|
1: move.b [R_DMA_CH9_CMD],$r0 ; wait for reset cycle to finish
|
|
andq IO_MASK (R_DMA_CH9_CMD, cmd),$r0
|
|
cmpq IO_STATE (R_DMA_CH9_CMD, cmd, reset),$r0
|
|
beq 1b
|
|
nop
|
|
|
|
;; setup port PA and PB default initial directions and data
|
|
;; including their shadow registers
|
|
|
|
move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0
|
|
#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
|
|
or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0
|
|
#endif
|
|
move.b $r0,[port_pa_dir_shadow]
|
|
move.b $r0,[R_PORT_PA_DIR]
|
|
move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0
|
|
#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7)
|
|
#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
|
|
and.b ~(1 << 7),$r0
|
|
#else
|
|
or.b (1 << 7),$r0
|
|
#endif
|
|
#endif
|
|
move.b $r0,[port_pa_data_shadow]
|
|
move.b $r0,[R_PORT_PA_DATA]
|
|
|
|
move.b CONFIG_ETRAX_DEF_R_PORT_PB_CONFIG,$r0
|
|
move.b $r0,[port_pb_config_shadow]
|
|
move.b $r0,[R_PORT_PB_CONFIG]
|
|
move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0
|
|
#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
|
|
or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0
|
|
#endif
|
|
move.b $r0,[port_pb_dir_shadow]
|
|
move.b $r0,[R_PORT_PB_DIR]
|
|
move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0
|
|
#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5)
|
|
#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
|
|
and.b ~(1 << 5),$r0
|
|
#else
|
|
or.b (1 << 5),$r0
|
|
#endif
|
|
#endif
|
|
move.b $r0,[port_pb_data_shadow]
|
|
move.b $r0,[R_PORT_PB_DATA]
|
|
|
|
moveq 0, $r0
|
|
move.d $r0,[port_pb_i2c_shadow]
|
|
move.d $r0, [R_PORT_PB_I2C]
|
|
|
|
moveq 0,$r0
|
|
#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10)
|
|
#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
|
|
and.d ~(1 << 10),$r0
|
|
#else
|
|
or.d (1 << 10),$r0
|
|
#endif
|
|
#endif
|
|
#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11)
|
|
#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH)
|
|
and.d ~(1 << 11),$r0
|
|
#else
|
|
or.d (1 << 11),$r0
|
|
#endif
|
|
#endif
|
|
move.d $r0,[port_g_data_shadow]
|
|
move.d $r0,[R_PORT_G_DATA]
|
|
|
|
;; setup the serial port 0 at 115200 baud for debug purposes
|
|
|
|
moveq IO_STATE (R_SERIAL0_XOFF, tx_stop, enable) \
|
|
| IO_STATE (R_SERIAL0_XOFF, auto_xoff, disable) \
|
|
| IO_FIELD (R_SERIAL0_XOFF, xoff_char, 0),$r0
|
|
move.d $r0,[R_SERIAL0_XOFF]
|
|
|
|
; 115.2kbaud for both transmit and receive
|
|
move.b IO_STATE (R_SERIAL0_BAUD, tr_baud, c115k2Hz) \
|
|
| IO_STATE (R_SERIAL0_BAUD, rec_baud, c115k2Hz),$r0
|
|
move.b $r0,[R_SERIAL0_BAUD]
|
|
|
|
; Set up and enable the serial0 receiver.
|
|
move.b IO_STATE (R_SERIAL0_REC_CTRL, dma_err, stop) \
|
|
| IO_STATE (R_SERIAL0_REC_CTRL, rec_enable, enable) \
|
|
| IO_STATE (R_SERIAL0_REC_CTRL, rts_, active) \
|
|
| IO_STATE (R_SERIAL0_REC_CTRL, sampling, middle) \
|
|
| IO_STATE (R_SERIAL0_REC_CTRL, rec_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL0_REC_CTRL, rec_par, even) \
|
|
| IO_STATE (R_SERIAL0_REC_CTRL, rec_par_en, disable) \
|
|
| IO_STATE (R_SERIAL0_REC_CTRL, rec_bitnr, rec_8bit),$r0
|
|
move.b $r0,[R_SERIAL0_REC_CTRL]
|
|
|
|
; Set up and enable the serial0 transmitter.
|
|
move.b IO_FIELD (R_SERIAL0_TR_CTRL, txd, 0) \
|
|
| IO_STATE (R_SERIAL0_TR_CTRL, tr_enable, enable) \
|
|
| IO_STATE (R_SERIAL0_TR_CTRL, auto_cts, disabled) \
|
|
| IO_STATE (R_SERIAL0_TR_CTRL, stop_bits, one_bit) \
|
|
| IO_STATE (R_SERIAL0_TR_CTRL, tr_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL0_TR_CTRL, tr_par, even) \
|
|
| IO_STATE (R_SERIAL0_TR_CTRL, tr_par_en, disable) \
|
|
| IO_STATE (R_SERIAL0_TR_CTRL, tr_bitnr, tr_8bit),$r0
|
|
move.b $r0,[R_SERIAL0_TR_CTRL]
|
|
|
|
;; setup the serial port 1 at 115200 baud for debug purposes
|
|
|
|
moveq IO_STATE (R_SERIAL1_XOFF, tx_stop, enable) \
|
|
| IO_STATE (R_SERIAL1_XOFF, auto_xoff, disable) \
|
|
| IO_FIELD (R_SERIAL1_XOFF, xoff_char, 0),$r0
|
|
move.d $r0,[R_SERIAL1_XOFF]
|
|
|
|
; 115.2kbaud for both transmit and receive
|
|
move.b IO_STATE (R_SERIAL1_BAUD, tr_baud, c115k2Hz) \
|
|
| IO_STATE (R_SERIAL1_BAUD, rec_baud, c115k2Hz),$r0
|
|
move.b $r0,[R_SERIAL1_BAUD]
|
|
|
|
; Set up and enable the serial1 receiver.
|
|
move.b IO_STATE (R_SERIAL1_REC_CTRL, dma_err, stop) \
|
|
| IO_STATE (R_SERIAL1_REC_CTRL, rec_enable, enable) \
|
|
| IO_STATE (R_SERIAL1_REC_CTRL, rts_, active) \
|
|
| IO_STATE (R_SERIAL1_REC_CTRL, sampling, middle) \
|
|
| IO_STATE (R_SERIAL1_REC_CTRL, rec_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL1_REC_CTRL, rec_par, even) \
|
|
| IO_STATE (R_SERIAL1_REC_CTRL, rec_par_en, disable) \
|
|
| IO_STATE (R_SERIAL1_REC_CTRL, rec_bitnr, rec_8bit),$r0
|
|
move.b $r0,[R_SERIAL1_REC_CTRL]
|
|
|
|
; Set up and enable the serial1 transmitter.
|
|
move.b IO_FIELD (R_SERIAL1_TR_CTRL, txd, 0) \
|
|
| IO_STATE (R_SERIAL1_TR_CTRL, tr_enable, enable) \
|
|
| IO_STATE (R_SERIAL1_TR_CTRL, auto_cts, disabled) \
|
|
| IO_STATE (R_SERIAL1_TR_CTRL, stop_bits, one_bit) \
|
|
| IO_STATE (R_SERIAL1_TR_CTRL, tr_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL1_TR_CTRL, tr_par, even) \
|
|
| IO_STATE (R_SERIAL1_TR_CTRL, tr_par_en, disable) \
|
|
| IO_STATE (R_SERIAL1_TR_CTRL, tr_bitnr, tr_8bit),$r0
|
|
move.b $r0,[R_SERIAL1_TR_CTRL]
|
|
|
|
#ifdef CONFIG_ETRAX_SERIAL_PORT2
|
|
;; setup the serial port 2 at 115200 baud for debug purposes
|
|
|
|
moveq IO_STATE (R_SERIAL2_XOFF, tx_stop, enable) \
|
|
| IO_STATE (R_SERIAL2_XOFF, auto_xoff, disable) \
|
|
| IO_FIELD (R_SERIAL2_XOFF, xoff_char, 0),$r0
|
|
move.d $r0,[R_SERIAL2_XOFF]
|
|
|
|
; 115.2kbaud for both transmit and receive
|
|
move.b IO_STATE (R_SERIAL2_BAUD, tr_baud, c115k2Hz) \
|
|
| IO_STATE (R_SERIAL2_BAUD, rec_baud, c115k2Hz),$r0
|
|
move.b $r0,[R_SERIAL2_BAUD]
|
|
|
|
; Set up and enable the serial2 receiver.
|
|
move.b IO_STATE (R_SERIAL2_REC_CTRL, dma_err, stop) \
|
|
| IO_STATE (R_SERIAL2_REC_CTRL, rec_enable, enable) \
|
|
| IO_STATE (R_SERIAL2_REC_CTRL, rts_, active) \
|
|
| IO_STATE (R_SERIAL2_REC_CTRL, sampling, middle) \
|
|
| IO_STATE (R_SERIAL2_REC_CTRL, rec_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL2_REC_CTRL, rec_par, even) \
|
|
| IO_STATE (R_SERIAL2_REC_CTRL, rec_par_en, disable) \
|
|
| IO_STATE (R_SERIAL2_REC_CTRL, rec_bitnr, rec_8bit),$r0
|
|
move.b $r0,[R_SERIAL2_REC_CTRL]
|
|
|
|
; Set up and enable the serial2 transmitter.
|
|
move.b IO_FIELD (R_SERIAL2_TR_CTRL, txd, 0) \
|
|
| IO_STATE (R_SERIAL2_TR_CTRL, tr_enable, enable) \
|
|
| IO_STATE (R_SERIAL2_TR_CTRL, auto_cts, disabled) \
|
|
| IO_STATE (R_SERIAL2_TR_CTRL, stop_bits, one_bit) \
|
|
| IO_STATE (R_SERIAL2_TR_CTRL, tr_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL2_TR_CTRL, tr_par, even) \
|
|
| IO_STATE (R_SERIAL2_TR_CTRL, tr_par_en, disable) \
|
|
| IO_STATE (R_SERIAL2_TR_CTRL, tr_bitnr, tr_8bit),$r0
|
|
move.b $r0,[R_SERIAL2_TR_CTRL]
|
|
#endif
|
|
|
|
#ifdef CONFIG_ETRAX_SERIAL_PORT3
|
|
;; setup the serial port 3 at 115200 baud for debug purposes
|
|
|
|
moveq IO_STATE (R_SERIAL3_XOFF, tx_stop, enable) \
|
|
| IO_STATE (R_SERIAL3_XOFF, auto_xoff, disable) \
|
|
| IO_FIELD (R_SERIAL3_XOFF, xoff_char, 0),$r0
|
|
move.d $r0,[R_SERIAL3_XOFF]
|
|
|
|
; 115.2kbaud for both transmit and receive
|
|
move.b IO_STATE (R_SERIAL3_BAUD, tr_baud, c115k2Hz) \
|
|
| IO_STATE (R_SERIAL3_BAUD, rec_baud, c115k2Hz),$r0
|
|
move.b $r0,[R_SERIAL3_BAUD]
|
|
|
|
; Set up and enable the serial3 receiver.
|
|
move.b IO_STATE (R_SERIAL3_REC_CTRL, dma_err, stop) \
|
|
| IO_STATE (R_SERIAL3_REC_CTRL, rec_enable, enable) \
|
|
| IO_STATE (R_SERIAL3_REC_CTRL, rts_, active) \
|
|
| IO_STATE (R_SERIAL3_REC_CTRL, sampling, middle) \
|
|
| IO_STATE (R_SERIAL3_REC_CTRL, rec_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL3_REC_CTRL, rec_par, even) \
|
|
| IO_STATE (R_SERIAL3_REC_CTRL, rec_par_en, disable) \
|
|
| IO_STATE (R_SERIAL3_REC_CTRL, rec_bitnr, rec_8bit),$r0
|
|
move.b $r0,[R_SERIAL3_REC_CTRL]
|
|
|
|
; Set up and enable the serial3 transmitter.
|
|
move.b IO_FIELD (R_SERIAL3_TR_CTRL, txd, 0) \
|
|
| IO_STATE (R_SERIAL3_TR_CTRL, tr_enable, enable) \
|
|
| IO_STATE (R_SERIAL3_TR_CTRL, auto_cts, disabled) \
|
|
| IO_STATE (R_SERIAL3_TR_CTRL, stop_bits, one_bit) \
|
|
| IO_STATE (R_SERIAL3_TR_CTRL, tr_stick_par, normal) \
|
|
| IO_STATE (R_SERIAL3_TR_CTRL, tr_par, even) \
|
|
| IO_STATE (R_SERIAL3_TR_CTRL, tr_par_en, disable) \
|
|
| IO_STATE (R_SERIAL3_TR_CTRL, tr_bitnr, tr_8bit),$r0
|
|
move.b $r0,[R_SERIAL3_TR_CTRL]
|
|
#endif
|
|
|
|
#endif /* CONFIG_SVINTO_SIM */
|
|
|
|
jump start_kernel ; jump into the C-function start_kernel in init/main.c
|
|
|
|
.data
|
|
etrax_irv:
|
|
.dword 0
|
|
romfs_start:
|
|
.dword 0
|
|
romfs_length:
|
|
.dword 0
|
|
romfs_in_flash:
|
|
.dword 0
|
|
|
|
;; put some special pages at the beginning of the kernel aligned
|
|
;; to page boundaries - the kernel cannot start until after this
|
|
|
|
#ifdef CONFIG_CRIS_LOW_MAP
|
|
swapper_pg_dir = 0x60002000
|
|
#else
|
|
swapper_pg_dir = 0xc0002000
|
|
#endif
|
|
|
|
.section ".init.data", "aw"
|
|
#include "../lib/hw_settings.S"
|