94605eff57
Fields obtained through cpuid vector 0x1(ebx[16:23]) and vector 0x4(eax[14:25], eax[26:31]) indicate the maximum values and might not always be the same as what is available and what OS sees. So make sure "siblings" and "cpu cores" values in /proc/cpuinfo reflect the values as seen by OS instead of what cpuid instruction says. This will also fix the buggy BIOS cases (for example where cpuid on a single core cpu says there are "2" siblings, even when HT is disabled in the BIOS. http://bugzilla.kernel.org/show_bug.cgi?id=4359) Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
170 lines
3.5 KiB
C
170 lines
3.5 KiB
C
#ifndef _LINUX_BITOPS_H
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#define _LINUX_BITOPS_H
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#include <asm/types.h>
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/*
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* ffs: find first bit set. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static inline int generic_ffs(int x)
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{
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int r = 1;
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if (!x)
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return 0;
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if (!(x & 0xffff)) {
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x >>= 16;
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r += 16;
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}
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if (!(x & 0xff)) {
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x >>= 8;
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r += 8;
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}
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if (!(x & 0xf)) {
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x >>= 4;
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r += 4;
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}
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if (!(x & 3)) {
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x >>= 2;
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r += 2;
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}
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if (!(x & 1)) {
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x >>= 1;
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r += 1;
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}
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return r;
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}
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/*
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* fls: find last bit set.
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*/
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static __inline__ int generic_fls(int x)
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{
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int r = 32;
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if (!x)
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return 0;
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if (!(x & 0xffff0000u)) {
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x <<= 16;
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r -= 16;
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}
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if (!(x & 0xff000000u)) {
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x <<= 8;
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r -= 8;
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}
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if (!(x & 0xf0000000u)) {
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x <<= 4;
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r -= 4;
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}
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if (!(x & 0xc0000000u)) {
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x <<= 2;
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r -= 2;
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}
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if (!(x & 0x80000000u)) {
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x <<= 1;
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r -= 1;
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}
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return r;
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}
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/*
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* Include this here because some architectures need generic_ffs/fls in
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* scope
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*/
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#include <asm/bitops.h>
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static __inline__ int get_bitmask_order(unsigned int count)
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{
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int order;
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order = fls(count);
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return order; /* We could be slightly more clever with -1 here... */
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}
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static __inline__ int get_count_order(unsigned int count)
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{
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int order;
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order = fls(count) - 1;
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if (count & (count - 1))
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order++;
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return order;
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}
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/*
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* hweightN: returns the hamming weight (i.e. the number
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* of bits set) of a N-bit word
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*/
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static inline unsigned int generic_hweight32(unsigned int w)
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{
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unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
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res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
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res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
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res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
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return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
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}
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static inline unsigned int generic_hweight16(unsigned int w)
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{
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unsigned int res = (w & 0x5555) + ((w >> 1) & 0x5555);
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res = (res & 0x3333) + ((res >> 2) & 0x3333);
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res = (res & 0x0F0F) + ((res >> 4) & 0x0F0F);
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return (res & 0x00FF) + ((res >> 8) & 0x00FF);
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}
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static inline unsigned int generic_hweight8(unsigned int w)
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{
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unsigned int res = (w & 0x55) + ((w >> 1) & 0x55);
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res = (res & 0x33) + ((res >> 2) & 0x33);
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return (res & 0x0F) + ((res >> 4) & 0x0F);
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}
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static inline unsigned long generic_hweight64(__u64 w)
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{
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#if BITS_PER_LONG < 64
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return generic_hweight32((unsigned int)(w >> 32)) +
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generic_hweight32((unsigned int)w);
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#else
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u64 res;
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res = (w & 0x5555555555555555ul) + ((w >> 1) & 0x5555555555555555ul);
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res = (res & 0x3333333333333333ul) + ((res >> 2) & 0x3333333333333333ul);
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res = (res & 0x0F0F0F0F0F0F0F0Ful) + ((res >> 4) & 0x0F0F0F0F0F0F0F0Ful);
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res = (res & 0x00FF00FF00FF00FFul) + ((res >> 8) & 0x00FF00FF00FF00FFul);
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res = (res & 0x0000FFFF0000FFFFul) + ((res >> 16) & 0x0000FFFF0000FFFFul);
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return (res & 0x00000000FFFFFFFFul) + ((res >> 32) & 0x00000000FFFFFFFFul);
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#endif
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}
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static inline unsigned long hweight_long(unsigned long w)
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{
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return sizeof(w) == 4 ? generic_hweight32(w) : generic_hweight64(w);
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}
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/*
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* rol32 - rotate a 32-bit value left
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*
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u32 rol32(__u32 word, unsigned int shift)
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{
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return (word << shift) | (word >> (32 - shift));
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}
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/*
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* ror32 - rotate a 32-bit value right
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*
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* @word: value to rotate
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* @shift: bits to roll
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*/
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static inline __u32 ror32(__u32 word, unsigned int shift)
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{
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return (word >> shift) | (word << (32 - shift));
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}
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#endif
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