android_kernel_xiaomi_sm8350/Documentation/blackfin/bfin-spi-notes.txt
Michael Hennerich 3322c7bbf6 Blackfin: document SPI CS limitations with CPHA=0
With the Blackfin on-chip SPI peripheral, there is some logic tied to
the CPHA bit whether the Slave Select Line is controlled by hardware
(CPHA=0) or controlled by software (CPHA=1).  However, the Linux SPI
bus driver assumes that the Slave Select being asserted during the
entire SPI transfer.  So explain these small details for people who
need certain SPI modes with standard CS behavior.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-06 12:55:52 -04:00

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SPI Chip Select behavior:
With the Blackfin on-chip SPI peripheral, there is some logic tied to the CPHA
bit whether the Slave Select Line is controlled by hardware (CPHA=0) or
controlled by software (CPHA=1). However, the Linux SPI bus driver assumes that
the Slave Select is always under software control and being asserted during
the entire SPI transfer. - And not just bits_per_word duration.
In most cases you can utilize SPI MODE_3 instead of MODE_0 to work-around this
behavior. If your SPI slave device in question requires SPI MODE_0 or MODE_2
timing, you can utilize the GPIO controlled SPI Slave Select option instead.
You can even use the same pin whose peripheral role is a SSEL,
but use it as a GPIO instead.