cad6d05f56
Add Pf to pool if adding a VLVF register value and the VFTA bit is already set. This patch addresses the unlikely situation that the PF adds a vlan entry when the vlvf is full, and a vf later adds the vlan to the vlvf. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
92 lines
3.2 KiB
C
92 lines
3.2 KiB
C
/*******************************************************************************
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Intel(R) Gigabit Ethernet Linux driver
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Copyright(c) 2007-2009 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#ifndef _E1000_MAC_H_
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#define _E1000_MAC_H_
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#include "e1000_hw.h"
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#include "e1000_phy.h"
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#include "e1000_nvm.h"
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#include "e1000_defines.h"
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/*
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* Functions that should not be called directly from drivers but can be used
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* by other files in this 'shared code'
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*/
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s32 igb_blink_led(struct e1000_hw *hw);
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s32 igb_check_for_copper_link(struct e1000_hw *hw);
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s32 igb_cleanup_led(struct e1000_hw *hw);
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s32 igb_config_fc_after_link_up(struct e1000_hw *hw);
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s32 igb_disable_pcie_master(struct e1000_hw *hw);
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s32 igb_force_mac_fc(struct e1000_hw *hw);
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s32 igb_get_auto_rd_done(struct e1000_hw *hw);
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s32 igb_get_bus_info_pcie(struct e1000_hw *hw);
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s32 igb_get_hw_semaphore(struct e1000_hw *hw);
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s32 igb_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed,
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u16 *duplex);
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s32 igb_id_led_init(struct e1000_hw *hw);
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s32 igb_led_off(struct e1000_hw *hw);
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s32 igb_setup_link(struct e1000_hw *hw);
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s32 igb_validate_mdi_setting(struct e1000_hw *hw);
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s32 igb_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg,
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u32 offset, u8 data);
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void igb_clear_hw_cntrs_base(struct e1000_hw *hw);
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void igb_clear_vfta(struct e1000_hw *hw);
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s32 igb_vfta_set(struct e1000_hw *hw, u32 vid, bool add);
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void igb_config_collision_dist(struct e1000_hw *hw);
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void igb_mta_set(struct e1000_hw *hw, u32 hash_value);
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void igb_put_hw_semaphore(struct e1000_hw *hw);
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void igb_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
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s32 igb_check_alt_mac_addr(struct e1000_hw *hw);
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void igb_reset_adaptive(struct e1000_hw *hw);
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void igb_update_adaptive(struct e1000_hw *hw);
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void igb_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
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bool igb_enable_mng_pass_thru(struct e1000_hw *hw);
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enum e1000_mng_mode {
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e1000_mng_mode_none = 0,
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e1000_mng_mode_asf,
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e1000_mng_mode_pt,
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e1000_mng_mode_ipmi,
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e1000_mng_mode_host_if_only
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};
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#define E1000_FACTPS_MNGCG 0x20000000
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#define E1000_FWSM_MODE_MASK 0xE
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#define E1000_FWSM_MODE_SHIFT 1
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#define E1000_MNG_DHCP_COOKIE_STATUS_VLAN 0x2
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extern void e1000_init_function_pointers_82575(struct e1000_hw *hw);
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extern u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
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#endif
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