android_kernel_xiaomi_sm8350/arch/powerpc/sysdev
Pavel Roskin a1fdf6940a [POWERPC] Assign all PCI busses on G3 Blue & White
G3 Blue & White is misconfigured by default so that CardBus controllers
in PCI slots don't work.  The PCI bridge is programmed to only allow
access to bus 1 but not higher busses.

The patch forces the PCI busses to be reassigned if a Grackle controller
is found and the machine identifies itself as "PowerMac1,1"

Signed-off-by: Pavel Roskin <proski@gnu.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07 14:03:22 +11:00
..
qe_lib [POWERPC] Remove fastcall function attribute 2007-01-26 01:52:27 -06:00
commproc.c [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
cpm2_common.c
cpm2_pic.c [POWERPC] cpm2: CPM2 interrupt controller fix 2007-02-07 14:03:20 +11:00
cpm2_pic.h [POWERPC] cpm2: CPM2 interrupt controller fix 2007-02-07 14:03:20 +11:00
dart_iommu.c
dart.h
dcr-low.S
dcr.c
fsl_soc.c [POWERPC] 8xx: platform related changes to the fsl_soc 2007-02-07 14:03:17 +11:00
fsl_soc.h
grackle.c [POWERPC] Assign all PCI busses on G3 Blue & White 2007-02-07 14:03:22 +11:00
i8259.c
indirect_pci.c
ipic.c [POWERPC] 83xx: Return a point to the struct ipic from ipic_init() 2007-01-26 01:45:32 -06:00
ipic.h
Makefile [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
micropatch.c [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
mmio_nvram.c [POWERPC] Fix cell's mmio nvram to properly parse device tree 2007-01-22 21:27:35 +11:00
mpc8xx_pic.c [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
mpc8xx_pic.h [POWERPC] 8xx: powerpc port of core CPM PIC 2007-02-07 14:03:17 +11:00
mpic.c [POWERPC] MPIC: support more than 256 sources 2007-02-07 14:03:19 +11:00
rom.c
tsi108_dev.c
tsi108_pci.c