android_kernel_xiaomi_sm8350/arch/mips/mm
Hugh Dickins 872fec16d9 [PATCH] mm: init_mm without ptlock
First step in pushing down the page_table_lock.  init_mm.page_table_lock has
been used throughout the architectures (usually for ioremap): not to serialize
kernel address space allocation (that's usually vmlist_lock), but because
pud_alloc,pmd_alloc,pte_alloc_kernel expect caller holds it.

Reverse that: don't lock or unlock init_mm.page_table_lock in any of the
architectures; instead rely on pud_alloc,pmd_alloc,pte_alloc_kernel to take
and drop it when allocating a new one, to check lest a racing task already
did.  Similarly no page_table_lock in vmalloc's map_vm_area.

Some temporary ugliness in __pud_alloc and __pmd_alloc: since they also handle
user mms, which are converted only by a later patch, for now they have to lock
differently according to whether or not it's init_mm.

If sources get muddled, there's a danger that an arch source taking
init_mm.page_table_lock will be mixed with common source also taking it (or
neither take it).  So break the rules and make another change, which should
break the build for such a mismatch: remove the redundant mm arg from
pte_alloc_kernel (ppc64 scrapped its distinct ioremap_mm in 2.6.13).

Exceptions: arm26 used pte_alloc_kernel on user mm, now pte_alloc_map; ia64
used pte_alloc_map on init_mm, now pte_alloc_kernel; parisc had bad args to
pmd_alloc and pte_alloc_kernel in unused USE_HPPA_IOREMAP code; ppc64
map_io_page forgot to unlock on failure; ppc mmu_mapin_ram and ppc64 im_free
took page_table_lock for no good reason.

Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-29 21:40:40 -07:00
..
c-r3k.c Cleanup the mess in cpu_cache_init. 2005-10-29 19:32:32 +01:00
c-r4k.c Rename page argument of flush_cache_page to something more descriptive. 2005-10-29 19:32:42 +01:00
c-sb1.c Don't copy SB1 cache error handler to uncached memory. 2005-10-29 19:32:34 +01:00
c-tx39.c Cleanup the mess in cpu_cache_init. 2005-10-29 19:32:32 +01:00
cache.c Fix zero length sys_cacheflush 2005-10-29 19:32:44 +01:00
cerr-sb1.c SB1 cache exception handling. 2005-10-29 19:32:48 +01:00
cex-gen.S
cex-sb1.S SB1 cache exception handling. 2005-10-29 19:32:48 +01:00
dma-coherent.c Arrested for multiple offences of header file inclusion. 2005-10-29 19:31:07 +01:00
dma-ip27.c [PATCH] gfp_t: dma-mapping (mips) 2005-10-28 08:16:48 -07:00
dma-ip32.c [PATCH] gfp_t: dma-mapping (mips) 2005-10-28 08:16:48 -07:00
dma-noncoherent.c Don't set up a sg dma address if we have no page address for some reason. 2005-10-29 19:32:17 +01:00
extable.c
fault.c Sparseify MIPS. 2005-10-29 19:30:50 +01:00
highmem.c Define kmap_atomic_pfn() for MIPS. 2005-10-29 19:31:42 +01:00
init.c Fix wrong comment. 2005-10-29 19:32:38 +01:00
ioremap.c [PATCH] mm: init_mm without ptlock 2005-10-29 21:40:40 -07:00
Makefile Fixup a few lose ends in explicit support for MIPS R1/R2. 2005-10-29 19:32:37 +01:00
pg-r4k.c Add/Fix missing bit of R4600 hit cacheop workaround. 2005-10-29 19:32:18 +01:00
pg-sb1.c Remove useless casts. Fix formatting. 2005-10-29 19:31:00 +01:00
pgtable-32.c Update MIPS to use the 4-level pagetable code thereby getting rid of 2005-10-29 19:30:31 +01:00
pgtable-64.c
pgtable.c
sc-ip22.c
sc-r5k.c
sc-rm7k.c Use macros for the RM7k cp0.config bits instead of magic numbers. 2005-10-29 19:31:28 +01:00
tlb-andes.c Update MIPS to use the 4-level pagetable code thereby getting rid of 2005-10-29 19:30:31 +01:00
tlb-r3k.c
tlb-r4k.c Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1. 2005-10-29 19:31:37 +01:00
tlb-r8k.c
tlbex-fault.S
tlbex.c Add support for SB1A CPU. 2005-10-29 19:32:46 +01:00