f9e4a00582
This change allows mpc83xx_restart to issue a software reset. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
167 lines
3.7 KiB
C
167 lines
3.7 KiB
C
/*
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* arch/ppc/syslib/ppc83xx_setup.c
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*
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* MPC83XX common board code
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*
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* Maintainer: Kumar Gala <kumar.gala@freescale.com>
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*
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* Copyright 2005 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/serial.h>
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#include <linux/tty.h> /* for linux/serial_core.h */
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#include <linux/serial_core.h>
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#include <linux/serial_8250.h>
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#include <asm/prom.h>
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#include <asm/time.h>
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#include <asm/mpc83xx.h>
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#include <asm/mmu.h>
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#include <asm/ppc_sys.h>
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#include <asm/kgdb.h>
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#include <asm/delay.h>
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#include <syslib/ppc83xx_setup.h>
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phys_addr_t immrbar;
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/* Return the amount of memory */
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unsigned long __init
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mpc83xx_find_end_of_memory(void)
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{
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bd_t *binfo;
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binfo = (bd_t *) __res;
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return binfo->bi_memsize;
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}
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long __init
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mpc83xx_time_init(void)
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{
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#define SPCR_OFFS 0x00000110
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#define SPCR_TBEN 0x00400000
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bd_t *binfo = (bd_t *)__res;
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u32 *spcr = ioremap(binfo->bi_immr_base + SPCR_OFFS, 4);
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*spcr |= SPCR_TBEN;
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iounmap(spcr);
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return 0;
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}
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/* The decrementer counts at the system (internal) clock freq divided by 4 */
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void __init
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mpc83xx_calibrate_decr(void)
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{
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bd_t *binfo = (bd_t *) __res;
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unsigned int freq, divisor;
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freq = binfo->bi_busfreq;
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divisor = 4;
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tb_ticks_per_jiffy = freq / HZ / divisor;
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tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
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}
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#ifdef CONFIG_SERIAL_8250
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void __init
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mpc83xx_early_serial_map(void)
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{
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#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
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struct uart_port serial_req;
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#endif
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struct plat_serial8250_port *pdata;
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bd_t *binfo = (bd_t *) __res;
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pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC83xx_DUART);
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/* Setup serial port access */
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pdata[0].uartclk = binfo->bi_busfreq;
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pdata[0].mapbase += binfo->bi_immr_base;
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pdata[0].membase = ioremap(pdata[0].mapbase, 0x100);
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#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
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memset(&serial_req, 0, sizeof (serial_req));
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serial_req.iotype = SERIAL_IO_MEM;
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serial_req.mapbase = pdata[0].mapbase;
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serial_req.membase = pdata[0].membase;
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serial_req.regshift = 0;
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gen550_init(0, &serial_req);
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#endif
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pdata[1].uartclk = binfo->bi_busfreq;
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pdata[1].mapbase += binfo->bi_immr_base;
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pdata[1].membase = ioremap(pdata[1].mapbase, 0x100);
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#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
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/* Assume gen550_init() doesn't modify serial_req */
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serial_req.mapbase = pdata[1].mapbase;
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serial_req.membase = pdata[1].membase;
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gen550_init(1, &serial_req);
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#endif
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}
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#endif
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void
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mpc83xx_restart(char *cmd)
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{
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volatile unsigned char __iomem *reg;
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unsigned char tmp;
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reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
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local_irq_disable();
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/*
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* Unlock the BCSR bits so a PRST will update the contents.
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* Otherwise the reset asserts but doesn't clear.
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*/
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tmp = in_8(reg + BCSR_MISC_REG3_OFF);
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tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
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out_8(reg + BCSR_MISC_REG3_OFF, tmp);
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/*
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* Trigger a reset via a low->high transition of the
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* PORESET bit.
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*/
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tmp = in_8(reg + BCSR_MISC_REG2_OFF);
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tmp &= ~BCSR_MISC_REG2_PORESET;
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out_8(reg + BCSR_MISC_REG2_OFF, tmp);
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udelay(1);
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tmp |= BCSR_MISC_REG2_PORESET;
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out_8(reg + BCSR_MISC_REG2_OFF, tmp);
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for(;;);
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}
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void
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mpc83xx_power_off(void)
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{
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local_irq_disable();
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for(;;);
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}
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void
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mpc83xx_halt(void)
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{
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local_irq_disable();
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for(;;);
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}
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/* PCI SUPPORT DOES NOT EXIT, MODEL after ppc85xx_setup.c */
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