android_kernel_xiaomi_sm8350/include/asm-blackfin/mach-bf533/blackfin.h
Graf Yang 5be36d22b2 [Blackfin] arch: add Blackfin on-chip SIR IrDA driver support
- add platform device resources in board files
 - add new bfin_sir.h to each machines

Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-04-25 03:09:15 +08:00

61 lines
2.1 KiB
C

/*
* File: include/asm-blackfin/mach-bf533/blackfin.h
* Based on:
* Author:
*
* Created:
* Description:
*
* Rev:
*
* Modified:
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; see the file COPYING.
* If not, write to the Free Software Foundation,
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*/
#ifndef _MACH_BLACKFIN_H_
#define _MACH_BLACKFIN_H_
#define BF533_FAMILY
#include "bf533.h"
#include "mem_map.h"
#include "defBF532.h"
#include "anomaly.h"
#if !defined(__ASSEMBLY__)
#include "cdefBF532.h"
#endif
#define BFIN_UART_NR_PORTS 1
#define OFFSET_THR 0x00 /* Transmit Holding register */
#define OFFSET_RBR 0x00 /* Receive Buffer register */
#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
#define OFFSET_IER 0x04 /* Interrupt Enable Register */
#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
#define OFFSET_IIR 0x08 /* Interrupt Identification Register */
#define OFFSET_LCR 0x0C /* Line Control Register */
#define OFFSET_MCR 0x10 /* Modem Control Register */
#define OFFSET_LSR 0x14 /* Line Status Register */
#define OFFSET_MSR 0x18 /* Modem Status Register */
#define OFFSET_SCR 0x1C /* SCR Scratch Register */
#define OFFSET_GCTL 0x24 /* Global Control Register */
#endif /* _MACH_BLACKFIN_H_ */