8875ccfb7a
Signed-off-by: Kelly Daly <kelly@au.ibm.com>
997 lines
25 KiB
C
997 lines
25 KiB
C
/*
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* Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
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* Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
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*
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* Description:
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* Architecture- / platform-specific boot-time initialization code for
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* the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
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* code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
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* <dan@net4x.com>.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#undef DEBUG
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/initrd.h>
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#include <linux/seq_file.h>
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#include <linux/kdev_t.h>
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#include <linux/major.h>
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#include <linux/root_dev.h>
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#include <asm/processor.h>
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#include <asm/machdep.h>
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/pgtable.h>
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#include <asm/mmu_context.h>
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#include <asm/cputable.h>
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#include <asm/sections.h>
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#include <asm/iommu.h>
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#include <asm/firmware.h>
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#include <asm/time.h>
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#include <asm/naca.h>
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#include <asm/paca.h>
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#include <asm/cache.h>
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#include <asm/sections.h>
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#include <asm/abs_addr.h>
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#include <asm/iseries/hv_lp_config.h>
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#include <asm/iseries/hv_call_event.h>
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#include <asm/iseries/hv_call_xm.h>
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#include <asm/iseries/it_lp_queue.h>
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#include <asm/iSeries/mf.h>
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#include <asm/iseries/hv_lp_event.h>
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#include <asm/iSeries/LparMap.h>
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#include "setup.h"
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#include "irq.h"
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#include "vpd_areas.h"
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#include "processor_vpd.h"
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#include "main_store.h"
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#include "call_sm.h"
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#include "call_hpt.h"
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extern void hvlog(char *fmt, ...);
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#ifdef DEBUG
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#define DBG(fmt...) hvlog(fmt)
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#else
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#define DBG(fmt...)
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#endif
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/* Function Prototypes */
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extern void ppcdbg_initialize(void);
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static void build_iSeries_Memory_Map(void);
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static void iseries_shared_idle(void);
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static void iseries_dedicated_idle(void);
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#ifdef CONFIG_PCI
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extern void iSeries_pci_final_fixup(void);
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#else
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static void iSeries_pci_final_fixup(void) { }
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#endif
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/* Global Variables */
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int piranha_simulator;
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extern int rd_size; /* Defined in drivers/block/rd.c */
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extern unsigned long klimit;
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extern unsigned long embedded_sysmap_start;
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extern unsigned long embedded_sysmap_end;
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extern unsigned long iSeries_recal_tb;
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extern unsigned long iSeries_recal_titan;
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static int mf_initialized;
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struct MemoryBlock {
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unsigned long absStart;
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unsigned long absEnd;
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unsigned long logicalStart;
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unsigned long logicalEnd;
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};
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/*
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* Process the main store vpd to determine where the holes in memory are
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* and return the number of physical blocks and fill in the array of
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* block data.
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*/
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static unsigned long iSeries_process_Condor_mainstore_vpd(
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struct MemoryBlock *mb_array, unsigned long max_entries)
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{
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unsigned long holeFirstChunk, holeSizeChunks;
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unsigned long numMemoryBlocks = 1;
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struct IoHriMainStoreSegment4 *msVpd =
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(struct IoHriMainStoreSegment4 *)xMsVpd;
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unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
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unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
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unsigned long holeSize = holeEnd - holeStart;
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printk("Mainstore_VPD: Condor\n");
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/*
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* Determine if absolute memory has any
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* holes so that we can interpret the
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* access map we get back from the hypervisor
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* correctly.
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*/
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mb_array[0].logicalStart = 0;
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mb_array[0].logicalEnd = 0x100000000;
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mb_array[0].absStart = 0;
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mb_array[0].absEnd = 0x100000000;
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if (holeSize) {
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numMemoryBlocks = 2;
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holeStart = holeStart & 0x000fffffffffffff;
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holeStart = addr_to_chunk(holeStart);
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holeFirstChunk = holeStart;
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holeSize = addr_to_chunk(holeSize);
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holeSizeChunks = holeSize;
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printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
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holeFirstChunk, holeSizeChunks );
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mb_array[0].logicalEnd = holeFirstChunk;
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mb_array[0].absEnd = holeFirstChunk;
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mb_array[1].logicalStart = holeFirstChunk;
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mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
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mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
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mb_array[1].absEnd = 0x100000000;
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}
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return numMemoryBlocks;
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}
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#define MaxSegmentAreas 32
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#define MaxSegmentAdrRangeBlocks 128
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#define MaxAreaRangeBlocks 4
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static unsigned long iSeries_process_Regatta_mainstore_vpd(
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struct MemoryBlock *mb_array, unsigned long max_entries)
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{
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struct IoHriMainStoreSegment5 *msVpdP =
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(struct IoHriMainStoreSegment5 *)xMsVpd;
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unsigned long numSegmentBlocks = 0;
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u32 existsBits = msVpdP->msAreaExists;
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unsigned long area_num;
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printk("Mainstore_VPD: Regatta\n");
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for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
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unsigned long numAreaBlocks;
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struct IoHriMainStoreArea4 *currentArea;
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if (existsBits & 0x80000000) {
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unsigned long block_num;
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currentArea = &msVpdP->msAreaArray[area_num];
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numAreaBlocks = currentArea->numAdrRangeBlocks;
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printk("ms_vpd: processing area %2ld blocks=%ld",
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area_num, numAreaBlocks);
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for (block_num = 0; block_num < numAreaBlocks;
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++block_num ) {
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/* Process an address range block */
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struct MemoryBlock tempBlock;
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unsigned long i;
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tempBlock.absStart =
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(unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
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tempBlock.absEnd =
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(unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
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tempBlock.logicalStart = 0;
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tempBlock.logicalEnd = 0;
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printk("\n block %ld absStart=%016lx absEnd=%016lx",
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block_num, tempBlock.absStart,
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tempBlock.absEnd);
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for (i = 0; i < numSegmentBlocks; ++i) {
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if (mb_array[i].absStart ==
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tempBlock.absStart)
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break;
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}
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if (i == numSegmentBlocks) {
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if (numSegmentBlocks == max_entries)
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panic("iSeries_process_mainstore_vpd: too many memory blocks");
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mb_array[numSegmentBlocks] = tempBlock;
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++numSegmentBlocks;
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} else
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printk(" (duplicate)");
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}
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printk("\n");
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}
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existsBits <<= 1;
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}
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/* Now sort the blocks found into ascending sequence */
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if (numSegmentBlocks > 1) {
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unsigned long m, n;
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for (m = 0; m < numSegmentBlocks - 1; ++m) {
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for (n = numSegmentBlocks - 1; m < n; --n) {
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if (mb_array[n].absStart <
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mb_array[n-1].absStart) {
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struct MemoryBlock tempBlock;
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tempBlock = mb_array[n];
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mb_array[n] = mb_array[n-1];
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mb_array[n-1] = tempBlock;
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}
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}
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}
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}
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/*
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* Assign "logical" addresses to each block. These
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* addresses correspond to the hypervisor "bitmap" space.
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* Convert all addresses into units of 256K chunks.
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*/
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{
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unsigned long i, nextBitmapAddress;
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printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
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nextBitmapAddress = 0;
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for (i = 0; i < numSegmentBlocks; ++i) {
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unsigned long length = mb_array[i].absEnd -
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mb_array[i].absStart;
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mb_array[i].logicalStart = nextBitmapAddress;
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mb_array[i].logicalEnd = nextBitmapAddress + length;
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nextBitmapAddress += length;
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printk(" Bitmap range: %016lx - %016lx\n"
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" Absolute range: %016lx - %016lx\n",
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mb_array[i].logicalStart,
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mb_array[i].logicalEnd,
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mb_array[i].absStart, mb_array[i].absEnd);
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mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
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0x000fffffffffffff);
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mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
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0x000fffffffffffff);
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mb_array[i].logicalStart =
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addr_to_chunk(mb_array[i].logicalStart);
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mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
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}
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}
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return numSegmentBlocks;
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}
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static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
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unsigned long max_entries)
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{
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unsigned long i;
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unsigned long mem_blocks = 0;
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if (cpu_has_feature(CPU_FTR_SLB))
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mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
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max_entries);
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else
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mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
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max_entries);
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printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
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for (i = 0; i < mem_blocks; ++i) {
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printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
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" abs chunks %016lx - %016lx\n",
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i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
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mb_array[i].absStart, mb_array[i].absEnd);
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}
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return mem_blocks;
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}
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static void __init iSeries_get_cmdline(void)
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{
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char *p, *q;
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/* copy the command line parameter from the primary VSP */
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HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
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HvLpDma_Direction_RemoteToLocal);
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p = cmd_line;
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q = cmd_line + 255;
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while(p < q) {
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if (!*p || *p == '\n')
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break;
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++p;
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}
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*p = 0;
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}
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static void __init iSeries_init_early(void)
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{
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DBG(" -> iSeries_init_early()\n");
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ppc64_firmware_features = FW_FEATURE_ISERIES;
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ppcdbg_initialize();
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ppc64_interrupt_controller = IC_ISERIES;
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#if defined(CONFIG_BLK_DEV_INITRD)
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/*
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* If the init RAM disk has been configured and there is
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* a non-zero starting address for it, set it up
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*/
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if (naca.xRamDisk) {
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initrd_start = (unsigned long)__va(naca.xRamDisk);
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initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE;
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initrd_below_start_ok = 1; // ramdisk in kernel space
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ROOT_DEV = Root_RAM0;
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if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize)
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rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024;
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} else
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#endif /* CONFIG_BLK_DEV_INITRD */
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{
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/* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
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}
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iSeries_recal_tb = get_tb();
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iSeries_recal_titan = HvCallXm_loadTod();
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/*
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* Initialize the hash table management pointers
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*/
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hpte_init_iSeries();
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/*
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* Initialize the DMA/TCE management
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*/
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iommu_init_early_iSeries();
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iSeries_get_cmdline();
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/* Save unparsed command line copy for /proc/cmdline */
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strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
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/* Parse early parameters, in particular mem=x */
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parse_early_param();
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if (memory_limit) {
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if (memory_limit < systemcfg->physicalMemorySize)
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systemcfg->physicalMemorySize = memory_limit;
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else {
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printk("Ignoring mem=%lu >= ram_top.\n", memory_limit);
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memory_limit = 0;
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}
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}
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/* Initialize machine-dependency vectors */
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#ifdef CONFIG_SMP
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smp_init_iSeries();
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#endif
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if (itLpNaca.xPirEnvironMode == 0)
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piranha_simulator = 1;
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/* Associate Lp Event Queue 0 with processor 0 */
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HvCallEvent_setLpEventQueueInterruptProc(0, 0);
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mf_init();
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mf_initialized = 1;
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mb();
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/* If we were passed an initrd, set the ROOT_DEV properly if the values
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* look sensible. If not, clear initrd reference.
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*/
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#ifdef CONFIG_BLK_DEV_INITRD
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if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
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initrd_end > initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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initrd_start = initrd_end = 0;
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#endif /* CONFIG_BLK_DEV_INITRD */
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DBG(" <- iSeries_init_early()\n");
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}
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struct mschunks_map mschunks_map = {
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/* XXX We don't use these, but Piranha might need them. */
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.chunk_size = MSCHUNKS_CHUNK_SIZE,
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.chunk_shift = MSCHUNKS_CHUNK_SHIFT,
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.chunk_mask = MSCHUNKS_OFFSET_MASK,
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};
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EXPORT_SYMBOL(mschunks_map);
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void mschunks_alloc(unsigned long num_chunks)
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{
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klimit = _ALIGN(klimit, sizeof(u32));
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mschunks_map.mapping = (u32 *)klimit;
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klimit += num_chunks * sizeof(u32);
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mschunks_map.num_chunks = num_chunks;
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}
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/*
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* The iSeries may have very large memories ( > 128 GB ) and a partition
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* may get memory in "chunks" that may be anywhere in the 2**52 real
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* address space. The chunks are 256K in size. To map this to the
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* memory model Linux expects, the AS/400 specific code builds a
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* translation table to translate what Linux thinks are "physical"
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* addresses to the actual real addresses. This allows us to make
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* it appear to Linux that we have contiguous memory starting at
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* physical address zero while in fact this could be far from the truth.
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* To avoid confusion, I'll let the words physical and/or real address
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* apply to the Linux addresses while I'll use "absolute address" to
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* refer to the actual hardware real address.
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*
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* build_iSeries_Memory_Map gets information from the Hypervisor and
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* looks at the Main Store VPD to determine the absolute addresses
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* of the memory that has been assigned to our partition and builds
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* a table used to translate Linux's physical addresses to these
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* absolute addresses. Absolute addresses are needed when
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* communicating with the hypervisor (e.g. to build HPT entries)
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*/
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static void __init build_iSeries_Memory_Map(void)
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{
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u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
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u32 nextPhysChunk;
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u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
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u32 totalChunks,moreChunks;
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u32 currChunk, thisChunk, absChunk;
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u32 currDword;
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u32 chunkBit;
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u64 map;
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struct MemoryBlock mb[32];
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unsigned long numMemoryBlocks, curBlock;
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/* Chunk size on iSeries is 256K bytes */
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totalChunks = (u32)HvLpConfig_getMsChunks();
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mschunks_alloc(totalChunks);
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/*
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* Get absolute address of our load area
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* and map it to physical address 0
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* This guarantees that the loadarea ends up at physical 0
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* otherwise, it might not be returned by PLIC as the first
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* chunks
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*/
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loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
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loadAreaSize = itLpNaca.xLoadAreaChunks;
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/*
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* Only add the pages already mapped here.
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* Otherwise we might add the hpt pages
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* The rest of the pages of the load area
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* aren't in the HPT yet and can still
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* be assigned an arbitrary physical address
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*/
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if ((loadAreaSize * 64) > HvPagesToMap)
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loadAreaSize = HvPagesToMap / 64;
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loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
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/*
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* TODO Do we need to do something if the HPT is in the 64MB load area?
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* This would be required if the itLpNaca.xLoadAreaChunks includes
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* the HPT size
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*/
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printk("Mapping load area - physical addr = 0000000000000000\n"
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" absolute addr = %016lx\n",
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chunk_to_addr(loadAreaFirstChunk));
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printk("Load area size %dK\n", loadAreaSize * 256);
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for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
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mschunks_map.mapping[nextPhysChunk] =
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loadAreaFirstChunk + nextPhysChunk;
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/*
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* Get absolute address of our HPT and remember it so
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* we won't map it to any physical address
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*/
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hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
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hptSizePages = (u32)HvCallHpt_getHptPages();
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hptSizeChunks = hptSizePages >> (MSCHUNKS_CHUNK_SHIFT - PAGE_SHIFT);
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hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
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printk("HPT absolute addr = %016lx, size = %dK\n",
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chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
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ppc64_pft_size = __ilog2(hptSizePages * PAGE_SIZE);
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|
|
|
/*
|
|
* The actual hashed page table is in the hypervisor,
|
|
* we have no direct access
|
|
*/
|
|
htab_address = NULL;
|
|
|
|
/*
|
|
* Determine if absolute memory has any
|
|
* holes so that we can interpret the
|
|
* access map we get back from the hypervisor
|
|
* correctly.
|
|
*/
|
|
numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
|
|
|
|
/*
|
|
* Process the main store access map from the hypervisor
|
|
* to build up our physical -> absolute translation table
|
|
*/
|
|
curBlock = 0;
|
|
currChunk = 0;
|
|
currDword = 0;
|
|
moreChunks = totalChunks;
|
|
|
|
while (moreChunks) {
|
|
map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
|
|
currDword);
|
|
thisChunk = currChunk;
|
|
while (map) {
|
|
chunkBit = map >> 63;
|
|
map <<= 1;
|
|
if (chunkBit) {
|
|
--moreChunks;
|
|
while (thisChunk >= mb[curBlock].logicalEnd) {
|
|
++curBlock;
|
|
if (curBlock >= numMemoryBlocks)
|
|
panic("out of memory blocks");
|
|
}
|
|
if (thisChunk < mb[curBlock].logicalStart)
|
|
panic("memory block error");
|
|
|
|
absChunk = mb[curBlock].absStart +
|
|
(thisChunk - mb[curBlock].logicalStart);
|
|
if (((absChunk < hptFirstChunk) ||
|
|
(absChunk > hptLastChunk)) &&
|
|
((absChunk < loadAreaFirstChunk) ||
|
|
(absChunk > loadAreaLastChunk))) {
|
|
mschunks_map.mapping[nextPhysChunk] =
|
|
absChunk;
|
|
++nextPhysChunk;
|
|
}
|
|
}
|
|
++thisChunk;
|
|
}
|
|
++currDword;
|
|
currChunk += 64;
|
|
}
|
|
|
|
/*
|
|
* main store size (in chunks) is
|
|
* totalChunks - hptSizeChunks
|
|
* which should be equal to
|
|
* nextPhysChunk
|
|
*/
|
|
systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
|
|
}
|
|
|
|
/*
|
|
* Document me.
|
|
*/
|
|
static void __init iSeries_setup_arch(void)
|
|
{
|
|
unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
|
|
|
|
if (get_paca()->lppaca.shared_proc) {
|
|
ppc_md.idle_loop = iseries_shared_idle;
|
|
printk(KERN_INFO "Using shared processor idle loop\n");
|
|
} else {
|
|
ppc_md.idle_loop = iseries_dedicated_idle;
|
|
printk(KERN_INFO "Using dedicated idle loop\n");
|
|
}
|
|
|
|
/* Setup the Lp Event Queue */
|
|
setup_hvlpevent_queue();
|
|
|
|
printk("Max logical processors = %d\n",
|
|
itVpdAreas.xSlicMaxLogicalProcs);
|
|
printk("Max physical processors = %d\n",
|
|
itVpdAreas.xSlicMaxPhysicalProcs);
|
|
|
|
systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
|
|
printk("Processor version = %x\n", systemcfg->processor);
|
|
}
|
|
|
|
static void iSeries_show_cpuinfo(struct seq_file *m)
|
|
{
|
|
seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
|
|
}
|
|
|
|
/*
|
|
* Document me.
|
|
* and Implement me.
|
|
*/
|
|
static int iSeries_get_irq(struct pt_regs *regs)
|
|
{
|
|
/* -2 means ignore this interrupt */
|
|
return -2;
|
|
}
|
|
|
|
/*
|
|
* Document me.
|
|
*/
|
|
static void iSeries_restart(char *cmd)
|
|
{
|
|
mf_reboot();
|
|
}
|
|
|
|
/*
|
|
* Document me.
|
|
*/
|
|
static void iSeries_power_off(void)
|
|
{
|
|
mf_power_off();
|
|
}
|
|
|
|
/*
|
|
* Document me.
|
|
*/
|
|
static void iSeries_halt(void)
|
|
{
|
|
mf_power_off();
|
|
}
|
|
|
|
static void __init iSeries_progress(char * st, unsigned short code)
|
|
{
|
|
printk("Progress: [%04x] - %s\n", (unsigned)code, st);
|
|
if (!piranha_simulator && mf_initialized) {
|
|
if (code != 0xffff)
|
|
mf_display_progress(code);
|
|
else
|
|
mf_clear_src();
|
|
}
|
|
}
|
|
|
|
static void __init iSeries_fixup_klimit(void)
|
|
{
|
|
/*
|
|
* Change klimit to take into account any ram disk
|
|
* that may be included
|
|
*/
|
|
if (naca.xRamDisk)
|
|
klimit = KERNELBASE + (u64)naca.xRamDisk +
|
|
(naca.xRamDiskSize * PAGE_SIZE);
|
|
else {
|
|
/*
|
|
* No ram disk was included - check and see if there
|
|
* was an embedded system map. Change klimit to take
|
|
* into account any embedded system map
|
|
*/
|
|
if (embedded_sysmap_end)
|
|
klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
|
|
0xfffffffffffff000);
|
|
}
|
|
}
|
|
|
|
static int __init iSeries_src_init(void)
|
|
{
|
|
/* clear the progress line */
|
|
ppc_md.progress(" ", 0xffff);
|
|
return 0;
|
|
}
|
|
|
|
late_initcall(iSeries_src_init);
|
|
|
|
static inline void process_iSeries_events(void)
|
|
{
|
|
asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
|
|
}
|
|
|
|
static void yield_shared_processor(void)
|
|
{
|
|
unsigned long tb;
|
|
|
|
HvCall_setEnabledInterrupts(HvCall_MaskIPI |
|
|
HvCall_MaskLpEvent |
|
|
HvCall_MaskLpProd |
|
|
HvCall_MaskTimeout);
|
|
|
|
tb = get_tb();
|
|
/* Compute future tb value when yield should expire */
|
|
HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
|
|
|
|
/*
|
|
* The decrementer stops during the yield. Force a fake decrementer
|
|
* here and let the timer_interrupt code sort out the actual time.
|
|
*/
|
|
get_paca()->lppaca.int_dword.fields.decr_int = 1;
|
|
process_iSeries_events();
|
|
}
|
|
|
|
static void iseries_shared_idle(void)
|
|
{
|
|
while (1) {
|
|
while (!need_resched() && !hvlpevent_is_pending()) {
|
|
local_irq_disable();
|
|
ppc64_runlatch_off();
|
|
|
|
/* Recheck with irqs off */
|
|
if (!need_resched() && !hvlpevent_is_pending())
|
|
yield_shared_processor();
|
|
|
|
HMT_medium();
|
|
local_irq_enable();
|
|
}
|
|
|
|
ppc64_runlatch_on();
|
|
|
|
if (hvlpevent_is_pending())
|
|
process_iSeries_events();
|
|
|
|
schedule();
|
|
}
|
|
}
|
|
|
|
static void iseries_dedicated_idle(void)
|
|
{
|
|
long oldval;
|
|
|
|
while (1) {
|
|
oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
|
|
|
|
if (!oldval) {
|
|
set_thread_flag(TIF_POLLING_NRFLAG);
|
|
|
|
while (!need_resched()) {
|
|
ppc64_runlatch_off();
|
|
HMT_low();
|
|
|
|
if (hvlpevent_is_pending()) {
|
|
HMT_medium();
|
|
ppc64_runlatch_on();
|
|
process_iSeries_events();
|
|
}
|
|
}
|
|
|
|
HMT_medium();
|
|
clear_thread_flag(TIF_POLLING_NRFLAG);
|
|
} else {
|
|
set_need_resched();
|
|
}
|
|
|
|
ppc64_runlatch_on();
|
|
schedule();
|
|
}
|
|
}
|
|
|
|
#ifndef CONFIG_PCI
|
|
void __init iSeries_init_IRQ(void) { }
|
|
#endif
|
|
|
|
static int __init iseries_probe(int platform)
|
|
{
|
|
return PLATFORM_ISERIES_LPAR == platform;
|
|
}
|
|
|
|
struct machdep_calls __initdata iseries_md = {
|
|
.setup_arch = iSeries_setup_arch,
|
|
.show_cpuinfo = iSeries_show_cpuinfo,
|
|
.init_IRQ = iSeries_init_IRQ,
|
|
.get_irq = iSeries_get_irq,
|
|
.init_early = iSeries_init_early,
|
|
.pcibios_fixup = iSeries_pci_final_fixup,
|
|
.restart = iSeries_restart,
|
|
.power_off = iSeries_power_off,
|
|
.halt = iSeries_halt,
|
|
.get_boot_time = iSeries_get_boot_time,
|
|
.set_rtc_time = iSeries_set_rtc_time,
|
|
.get_rtc_time = iSeries_get_rtc_time,
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
.progress = iSeries_progress,
|
|
.probe = iseries_probe,
|
|
/* XXX Implement enable_pmcs for iSeries */
|
|
};
|
|
|
|
struct blob {
|
|
unsigned char data[PAGE_SIZE];
|
|
unsigned long next;
|
|
};
|
|
|
|
struct iseries_flat_dt {
|
|
struct boot_param_header header;
|
|
u64 reserve_map[2];
|
|
struct blob dt;
|
|
struct blob strings;
|
|
};
|
|
|
|
struct iseries_flat_dt iseries_dt;
|
|
|
|
void dt_init(struct iseries_flat_dt *dt)
|
|
{
|
|
dt->header.off_mem_rsvmap =
|
|
offsetof(struct iseries_flat_dt, reserve_map);
|
|
dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
|
|
dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
|
|
dt->header.totalsize = sizeof(struct iseries_flat_dt);
|
|
dt->header.dt_strings_size = sizeof(struct blob);
|
|
|
|
/* There is no notion of hardware cpu id on iSeries */
|
|
dt->header.boot_cpuid_phys = smp_processor_id();
|
|
|
|
dt->dt.next = (unsigned long)&dt->dt.data;
|
|
dt->strings.next = (unsigned long)&dt->strings.data;
|
|
|
|
dt->header.magic = OF_DT_HEADER;
|
|
dt->header.version = 0x10;
|
|
dt->header.last_comp_version = 0x10;
|
|
|
|
dt->reserve_map[0] = 0;
|
|
dt->reserve_map[1] = 0;
|
|
}
|
|
|
|
void dt_check_blob(struct blob *b)
|
|
{
|
|
if (b->next >= (unsigned long)&b->next) {
|
|
DBG("Ran out of space in flat device tree blob!\n");
|
|
BUG();
|
|
}
|
|
}
|
|
|
|
void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
|
|
{
|
|
*((u32*)dt->dt.next) = value;
|
|
dt->dt.next += sizeof(u32);
|
|
|
|
dt_check_blob(&dt->dt);
|
|
}
|
|
|
|
void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
|
|
{
|
|
*((u64*)dt->dt.next) = value;
|
|
dt->dt.next += sizeof(u64);
|
|
|
|
dt_check_blob(&dt->dt);
|
|
}
|
|
|
|
unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
|
|
{
|
|
unsigned long start = blob->next - (unsigned long)blob->data;
|
|
|
|
memcpy((char *)blob->next, data, len);
|
|
blob->next = _ALIGN(blob->next + len, 4);
|
|
|
|
dt_check_blob(blob);
|
|
|
|
return start;
|
|
}
|
|
|
|
void dt_start_node(struct iseries_flat_dt *dt, char *name)
|
|
{
|
|
dt_push_u32(dt, OF_DT_BEGIN_NODE);
|
|
dt_push_bytes(&dt->dt, name, strlen(name) + 1);
|
|
}
|
|
|
|
#define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
|
|
|
|
void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
|
|
{
|
|
unsigned long offset;
|
|
|
|
dt_push_u32(dt, OF_DT_PROP);
|
|
|
|
/* Length of the data */
|
|
dt_push_u32(dt, len);
|
|
|
|
/* Put the property name in the string blob. */
|
|
offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
|
|
|
|
/* The offset of the properties name in the string blob. */
|
|
dt_push_u32(dt, (u32)offset);
|
|
|
|
/* The actual data. */
|
|
dt_push_bytes(&dt->dt, data, len);
|
|
}
|
|
|
|
void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
|
|
{
|
|
dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
|
|
}
|
|
|
|
void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
|
|
{
|
|
dt_prop(dt, name, (char *)&data, sizeof(u32));
|
|
}
|
|
|
|
void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
|
|
{
|
|
dt_prop(dt, name, (char *)&data, sizeof(u64));
|
|
}
|
|
|
|
void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
|
|
{
|
|
dt_prop(dt, name, (char *)data, sizeof(u64) * n);
|
|
}
|
|
|
|
void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
|
|
{
|
|
dt_prop(dt, name, NULL, 0);
|
|
}
|
|
|
|
void dt_cpus(struct iseries_flat_dt *dt)
|
|
{
|
|
unsigned char buf[32];
|
|
unsigned char *p;
|
|
unsigned int i, index;
|
|
struct IoHriProcessorVpd *d;
|
|
|
|
/* yuck */
|
|
snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
|
|
p = strchr(buf, ' ');
|
|
if (!p) p = buf + strlen(buf);
|
|
|
|
dt_start_node(dt, "cpus");
|
|
dt_prop_u32(dt, "#address-cells", 1);
|
|
dt_prop_u32(dt, "#size-cells", 0);
|
|
|
|
for (i = 0; i < NR_CPUS; i++) {
|
|
if (paca[i].lppaca.dyn_proc_status >= 2)
|
|
continue;
|
|
|
|
snprintf(p, 32 - (p - buf), "@%d", i);
|
|
dt_start_node(dt, buf);
|
|
|
|
dt_prop_str(dt, "device_type", "cpu");
|
|
|
|
index = paca[i].lppaca.dyn_hv_phys_proc_index;
|
|
d = &xIoHriProcessorVpd[index];
|
|
|
|
dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
|
|
dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
|
|
|
|
dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
|
|
dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
|
|
|
|
/* magic conversions to Hz copied from old code */
|
|
dt_prop_u32(dt, "clock-frequency",
|
|
((1UL << 34) * 1000000) / d->xProcFreq);
|
|
dt_prop_u32(dt, "timebase-frequency",
|
|
((1UL << 32) * 1000000) / d->xTimeBaseFreq);
|
|
|
|
dt_prop_u32(dt, "reg", i);
|
|
|
|
dt_end_node(dt);
|
|
}
|
|
|
|
dt_end_node(dt);
|
|
}
|
|
|
|
void build_flat_dt(struct iseries_flat_dt *dt)
|
|
{
|
|
u64 tmp[2];
|
|
|
|
dt_init(dt);
|
|
|
|
dt_start_node(dt, "");
|
|
|
|
dt_prop_u32(dt, "#address-cells", 2);
|
|
dt_prop_u32(dt, "#size-cells", 2);
|
|
|
|
/* /memory */
|
|
dt_start_node(dt, "memory@0");
|
|
dt_prop_str(dt, "name", "memory");
|
|
dt_prop_str(dt, "device_type", "memory");
|
|
tmp[0] = 0;
|
|
tmp[1] = systemcfg->physicalMemorySize;
|
|
dt_prop_u64_list(dt, "reg", tmp, 2);
|
|
dt_end_node(dt);
|
|
|
|
/* /chosen */
|
|
dt_start_node(dt, "chosen");
|
|
dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
|
|
dt_end_node(dt);
|
|
|
|
dt_cpus(dt);
|
|
|
|
dt_end_node(dt);
|
|
|
|
dt_push_u32(dt, OF_DT_END);
|
|
}
|
|
|
|
void * __init iSeries_early_setup(void)
|
|
{
|
|
iSeries_fixup_klimit();
|
|
|
|
/*
|
|
* Initialize the table which translate Linux physical addresses to
|
|
* AS/400 absolute addresses
|
|
*/
|
|
build_iSeries_Memory_Map();
|
|
|
|
build_flat_dt(&iseries_dt);
|
|
|
|
return (void *) __pa(&iseries_dt);
|
|
}
|