c9fbf7e070
The WM8994 has an interrupt controller which supports interrupts for both CODEC and GPIO portions of the chip. Support this using genirq, while allowing for systems that do not have an interrupt hooked up. Wrapper functions are provided for the IRQ request and free to simplify the code in consumer drivers when handling cases where IRQs are not set up. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Samuel Ortiz <sameo@linux.intel.com>
311 lines
7.0 KiB
C
311 lines
7.0 KiB
C
/*
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* wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
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*
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* Copyright 2010 Wolfson Microelectronics PLC.
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#include <linux/interrupt.h>
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#include <linux/mfd/wm8994/core.h>
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#include <linux/mfd/wm8994/registers.h>
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#include <linux/delay.h>
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struct wm8994_irq_data {
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int reg;
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int mask;
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};
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static struct wm8994_irq_data wm8994_irqs[] = {
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[WM8994_IRQ_TEMP_SHUT] = {
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.reg = 2,
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.mask = WM8994_TEMP_SHUT_EINT,
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},
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[WM8994_IRQ_MIC1_DET] = {
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.reg = 2,
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.mask = WM8994_MIC1_DET_EINT,
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},
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[WM8994_IRQ_MIC1_SHRT] = {
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.reg = 2,
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.mask = WM8994_MIC1_SHRT_EINT,
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},
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[WM8994_IRQ_MIC2_DET] = {
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.reg = 2,
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.mask = WM8994_MIC2_DET_EINT,
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},
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[WM8994_IRQ_MIC2_SHRT] = {
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.reg = 2,
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.mask = WM8994_MIC2_SHRT_EINT,
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},
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[WM8994_IRQ_FLL1_LOCK] = {
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.reg = 2,
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.mask = WM8994_FLL1_LOCK_EINT,
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},
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[WM8994_IRQ_FLL2_LOCK] = {
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.reg = 2,
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.mask = WM8994_FLL2_LOCK_EINT,
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},
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[WM8994_IRQ_SRC1_LOCK] = {
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.reg = 2,
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.mask = WM8994_SRC1_LOCK_EINT,
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},
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[WM8994_IRQ_SRC2_LOCK] = {
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.reg = 2,
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.mask = WM8994_SRC2_LOCK_EINT,
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},
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[WM8994_IRQ_AIF1DRC1_SIG_DET] = {
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.reg = 2,
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.mask = WM8994_AIF1DRC1_SIG_DET,
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},
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[WM8994_IRQ_AIF1DRC2_SIG_DET] = {
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.reg = 2,
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.mask = WM8994_AIF1DRC2_SIG_DET_EINT,
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},
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[WM8994_IRQ_AIF2DRC_SIG_DET] = {
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.reg = 2,
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.mask = WM8994_AIF2DRC_SIG_DET_EINT,
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},
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[WM8994_IRQ_FIFOS_ERR] = {
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.reg = 2,
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.mask = WM8994_FIFOS_ERR_EINT,
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},
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[WM8994_IRQ_WSEQ_DONE] = {
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.reg = 2,
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.mask = WM8994_WSEQ_DONE_EINT,
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},
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[WM8994_IRQ_DCS_DONE] = {
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.reg = 2,
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.mask = WM8994_DCS_DONE_EINT,
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},
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[WM8994_IRQ_TEMP_WARN] = {
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.reg = 2,
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.mask = WM8994_TEMP_WARN_EINT,
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},
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[WM8994_IRQ_GPIO(1)] = {
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.reg = 1,
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.mask = WM8994_GP1_EINT,
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},
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[WM8994_IRQ_GPIO(2)] = {
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.reg = 1,
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.mask = WM8994_GP2_EINT,
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},
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[WM8994_IRQ_GPIO(3)] = {
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.reg = 1,
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.mask = WM8994_GP3_EINT,
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},
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[WM8994_IRQ_GPIO(4)] = {
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.reg = 1,
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.mask = WM8994_GP4_EINT,
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},
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[WM8994_IRQ_GPIO(5)] = {
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.reg = 1,
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.mask = WM8994_GP5_EINT,
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},
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[WM8994_IRQ_GPIO(6)] = {
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.reg = 1,
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.mask = WM8994_GP6_EINT,
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},
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[WM8994_IRQ_GPIO(7)] = {
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.reg = 1,
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.mask = WM8994_GP7_EINT,
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},
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[WM8994_IRQ_GPIO(8)] = {
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.reg = 1,
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.mask = WM8994_GP8_EINT,
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},
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[WM8994_IRQ_GPIO(9)] = {
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.reg = 1,
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.mask = WM8994_GP8_EINT,
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},
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[WM8994_IRQ_GPIO(10)] = {
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.reg = 1,
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.mask = WM8994_GP10_EINT,
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},
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[WM8994_IRQ_GPIO(11)] = {
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.reg = 1,
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.mask = WM8994_GP11_EINT,
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},
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};
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static inline int irq_data_to_status_reg(struct wm8994_irq_data *irq_data)
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{
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return WM8994_INTERRUPT_STATUS_1 - 1 + irq_data->reg;
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}
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static inline int irq_data_to_mask_reg(struct wm8994_irq_data *irq_data)
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{
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return WM8994_INTERRUPT_STATUS_1_MASK - 1 + irq_data->reg;
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}
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static inline struct wm8994_irq_data *irq_to_wm8994_irq(struct wm8994 *wm8994,
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int irq)
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{
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return &wm8994_irqs[irq - wm8994->irq_base];
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}
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static void wm8994_irq_lock(unsigned int irq)
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{
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struct wm8994 *wm8994 = get_irq_chip_data(irq);
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mutex_lock(&wm8994->irq_lock);
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}
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static void wm8994_irq_sync_unlock(unsigned int irq)
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{
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struct wm8994 *wm8994 = get_irq_chip_data(irq);
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int i;
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for (i = 0; i < ARRAY_SIZE(wm8994->irq_masks_cur); i++) {
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/* If there's been a change in the mask write it back
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* to the hardware. */
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if (wm8994->irq_masks_cur[i] != wm8994->irq_masks_cache[i]) {
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wm8994->irq_masks_cache[i] = wm8994->irq_masks_cur[i];
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wm8994_reg_write(wm8994,
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WM8994_INTERRUPT_STATUS_1_MASK + i,
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wm8994->irq_masks_cur[i]);
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}
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}
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mutex_unlock(&wm8994->irq_lock);
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}
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static void wm8994_irq_unmask(unsigned int irq)
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{
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struct wm8994 *wm8994 = get_irq_chip_data(irq);
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struct wm8994_irq_data *irq_data = irq_to_wm8994_irq(wm8994, irq);
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wm8994->irq_masks_cur[irq_data->reg - 1] &= ~irq_data->mask;
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}
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static void wm8994_irq_mask(unsigned int irq)
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{
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struct wm8994 *wm8994 = get_irq_chip_data(irq);
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struct wm8994_irq_data *irq_data = irq_to_wm8994_irq(wm8994, irq);
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wm8994->irq_masks_cur[irq_data->reg - 1] |= irq_data->mask;
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}
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static struct irq_chip wm8994_irq_chip = {
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.name = "wm8994",
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.bus_lock = wm8994_irq_lock,
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.bus_sync_unlock = wm8994_irq_sync_unlock,
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.mask = wm8994_irq_mask,
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.unmask = wm8994_irq_unmask,
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};
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/* The processing of the primary interrupt occurs in a thread so that
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* we can interact with the device over I2C or SPI. */
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static irqreturn_t wm8994_irq_thread(int irq, void *data)
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{
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struct wm8994 *wm8994 = data;
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unsigned int i;
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u16 status[WM8994_NUM_IRQ_REGS];
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int ret;
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ret = wm8994_bulk_read(wm8994, WM8994_INTERRUPT_STATUS_1,
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WM8994_NUM_IRQ_REGS, status);
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if (ret < 0) {
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dev_err(wm8994->dev, "Failed to read interrupt status: %d\n",
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ret);
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return IRQ_NONE;
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}
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/* Apply masking */
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for (i = 0; i < WM8994_NUM_IRQ_REGS; i++)
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status[i] &= ~wm8994->irq_masks_cur[i];
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/* Report */
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for (i = 0; i < ARRAY_SIZE(wm8994_irqs); i++) {
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if (status[wm8994_irqs[i].reg - 1] & wm8994_irqs[i].mask)
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handle_nested_irq(wm8994->irq_base + i);
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}
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/* Ack any unmasked IRQs */
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for (i = 0; i < ARRAY_SIZE(status); i++) {
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if (status[i])
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wm8994_reg_write(wm8994, WM8994_INTERRUPT_STATUS_1 + i,
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status[i]);
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}
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return IRQ_HANDLED;
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}
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int wm8994_irq_init(struct wm8994 *wm8994)
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{
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int i, cur_irq, ret;
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mutex_init(&wm8994->irq_lock);
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/* Mask the individual interrupt sources */
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for (i = 0; i < ARRAY_SIZE(wm8994->irq_masks_cur); i++) {
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wm8994->irq_masks_cur[i] = 0xffff;
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wm8994->irq_masks_cache[i] = 0xffff;
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wm8994_reg_write(wm8994, WM8994_INTERRUPT_STATUS_1_MASK + i,
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0xffff);
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}
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if (!wm8994->irq) {
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dev_warn(wm8994->dev,
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"No interrupt specified, no interrupts\n");
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wm8994->irq_base = 0;
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return 0;
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}
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if (!wm8994->irq_base) {
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dev_err(wm8994->dev,
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"No interrupt base specified, no interrupts\n");
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return 0;
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}
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/* Register them with genirq */
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for (cur_irq = wm8994->irq_base;
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cur_irq < ARRAY_SIZE(wm8994_irqs) + wm8994->irq_base;
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cur_irq++) {
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set_irq_chip_data(cur_irq, wm8994);
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set_irq_chip_and_handler(cur_irq, &wm8994_irq_chip,
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handle_edge_irq);
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set_irq_nested_thread(cur_irq, 1);
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/* ARM needs us to explicitly flag the IRQ as valid
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* and will set them noprobe when we do so. */
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#ifdef CONFIG_ARM
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set_irq_flags(cur_irq, IRQF_VALID);
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#else
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set_irq_noprobe(cur_irq);
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#endif
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}
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ret = request_threaded_irq(wm8994->irq, NULL, wm8994_irq_thread,
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IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
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"wm8994", wm8994);
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if (ret != 0) {
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dev_err(wm8994->dev, "Failed to request IRQ %d: %d\n",
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wm8994->irq, ret);
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return ret;
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}
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/* Enable top level interrupt if it was masked */
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wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
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return 0;
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}
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void wm8994_irq_exit(struct wm8994 *wm8994)
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{
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if (wm8994->irq)
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free_irq(wm8994->irq, wm8994);
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}
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