31ab269a03
It's widely seen a MCE non-fatal error reported after resume. It seems MCE resume is lacked under ia32. This patch tries to fix the gap. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
78 lines
1.6 KiB
C
78 lines
1.6 KiB
C
/*
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* mce.c - x86 Machine Check Exception Reporting
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* (c) 2002 Alan Cox <alan@redhat.com>, Dave Jones <davej@codemonkey.org.uk>
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*/
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/thread_info.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include "mce.h"
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int mce_disabled = 0;
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int nr_mce_banks;
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EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
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/* Handle unconfigured int18 (should never happen) */
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static fastcall void unexpected_machine_check(struct pt_regs * regs, long error_code)
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{
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printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n", smp_processor_id());
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}
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/* Call the installed machine check handler for this CPU setup. */
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void fastcall (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
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/* This has to be run for each processor */
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void mcheck_init(struct cpuinfo_x86 *c)
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{
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if (mce_disabled==1)
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return;
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switch (c->x86_vendor) {
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case X86_VENDOR_AMD:
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if (c->x86==6 || c->x86==15)
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amd_mcheck_init(c);
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break;
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case X86_VENDOR_INTEL:
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if (c->x86==5)
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intel_p5_mcheck_init(c);
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if (c->x86==6)
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intel_p6_mcheck_init(c);
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if (c->x86==15)
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intel_p4_mcheck_init(c);
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break;
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case X86_VENDOR_CENTAUR:
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if (c->x86==5)
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winchip_mcheck_init(c);
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break;
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default:
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break;
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}
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}
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static int __init mcheck_disable(char *str)
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{
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mce_disabled = 1;
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return 0;
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}
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static int __init mcheck_enable(char *str)
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{
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mce_disabled = -1;
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return 0;
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}
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__setup("nomce", mcheck_disable);
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__setup("mce", mcheck_enable);
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