1635317fac
This patch pulls the PCI-related junk out of struct device_node and puts it in a separate structure, struct pci_dn. The device_node now just has a void * pointer in it, which points to a struct pci_dn for nodes that represent PCI devices. It could potentially be used in future for device-specific data for other sorts of devices, such as virtual I/O devices. Signed-off-by: Paul Mackerras <paulus@samba.org>
768 lines
18 KiB
C
768 lines
18 KiB
C
/*
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* arch/ppc/platforms/pmac_feature.c
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*
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* Copyright (C) 1996-2001 Paul Mackerras (paulus@cs.anu.edu.au)
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* Ben. Herrenschmidt (benh@kernel.crashing.org)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* TODO:
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*
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* - Replace mdelay with some schedule loop if possible
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* - Shorten some obfuscated delays on some routines (like modem
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* power)
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* - Refcount some clocks (see darwin)
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* - Split split split...
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*
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*/
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#include <linux/config.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/adb.h>
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#include <linux/pmu.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <asm/sections.h>
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#include <asm/errno.h>
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#include <asm/keylargo.h>
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#include <asm/uninorth.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/pmac_feature.h>
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#include <asm/dbdma.h>
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#include <asm/pci-bridge.h>
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#include <asm/pmac_low_i2c.h>
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#undef DEBUG_FEATURE
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#ifdef DEBUG_FEATURE
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#define DBG(fmt...) printk(KERN_DEBUG fmt)
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#else
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#define DBG(fmt...)
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#endif
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/*
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* We use a single global lock to protect accesses. Each driver has
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* to take care of its own locking
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*/
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static DEFINE_SPINLOCK(feature_lock __pmacdata);
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#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
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#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
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/*
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* Instance of some macio stuffs
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*/
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struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata;
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struct macio_chip* __pmac macio_find(struct device_node* child, int type)
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{
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while(child) {
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int i;
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for (i=0; i < MAX_MACIO_CHIPS && macio_chips[i].of_node; i++)
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if (child == macio_chips[i].of_node &&
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(!type || macio_chips[i].type == type))
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return &macio_chips[i];
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child = child->parent;
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(macio_find);
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static const char* macio_names[] __pmacdata =
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{
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"Unknown",
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"Grand Central",
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"OHare",
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"OHareII",
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"Heathrow",
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"Gatwick",
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"Paddington",
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"Keylargo",
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"Pangea",
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"Intrepid",
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"K2"
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};
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/*
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* Uninorth reg. access. Note that Uni-N regs are big endian
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*/
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#define UN_REG(r) (uninorth_base + ((r) >> 2))
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#define UN_IN(r) (in_be32(UN_REG(r)))
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#define UN_OUT(r,v) (out_be32(UN_REG(r), (v)))
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#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
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#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
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static struct device_node* uninorth_node __pmacdata;
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static u32* uninorth_base __pmacdata;
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static u32 uninorth_rev __pmacdata;
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static void *u3_ht;
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extern struct device_node *k2_skiplist[2];
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/*
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* For each motherboard family, we have a table of functions pointers
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* that handle the various features.
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*/
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typedef long (*feature_call)(struct device_node* node, long param, long value);
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struct feature_table_entry {
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unsigned int selector;
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feature_call function;
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};
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struct pmac_mb_def
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{
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const char* model_string;
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const char* model_name;
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int model_id;
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struct feature_table_entry* features;
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unsigned long board_flags;
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};
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static struct pmac_mb_def pmac_mb __pmacdata;
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/*
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* Here are the chip specific feature functions
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*/
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static long __pmac g5_read_gpio(struct device_node* node, long param, long value)
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{
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struct macio_chip* macio = &macio_chips[0];
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return MACIO_IN8(param);
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}
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static long __pmac g5_write_gpio(struct device_node* node, long param, long value)
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{
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struct macio_chip* macio = &macio_chips[0];
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MACIO_OUT8(param, (u8)(value & 0xff));
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return 0;
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}
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static long __pmac g5_gmac_enable(struct device_node* node, long param, long value)
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{
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struct macio_chip* macio = &macio_chips[0];
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unsigned long flags;
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if (node == NULL)
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return -ENODEV;
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LOCK(flags);
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if (value) {
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MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
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mb();
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k2_skiplist[0] = NULL;
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} else {
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k2_skiplist[0] = node;
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mb();
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MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_GMAC_CLK_ENABLE);
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}
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UNLOCK(flags);
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mdelay(1);
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return 0;
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}
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static long __pmac g5_fw_enable(struct device_node* node, long param, long value)
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{
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struct macio_chip* macio = &macio_chips[0];
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unsigned long flags;
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if (node == NULL)
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return -ENODEV;
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LOCK(flags);
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if (value) {
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MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
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mb();
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k2_skiplist[1] = NULL;
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} else {
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k2_skiplist[1] = node;
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mb();
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MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_FW_CLK_ENABLE);
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}
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UNLOCK(flags);
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mdelay(1);
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return 0;
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}
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static long __pmac g5_mpic_enable(struct device_node* node, long param, long value)
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{
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unsigned long flags;
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if (node->parent == NULL || strcmp(node->parent->name, "u3"))
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return 0;
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LOCK(flags);
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UN_BIS(U3_TOGGLE_REG, U3_MPIC_RESET | U3_MPIC_OUTPUT_ENABLE);
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UNLOCK(flags);
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return 0;
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}
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static long __pmac g5_eth_phy_reset(struct device_node* node, long param, long value)
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{
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struct macio_chip* macio = &macio_chips[0];
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struct device_node *phy;
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int need_reset;
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/*
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* We must not reset the combo PHYs, only the BCM5221 found in
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* the iMac G5.
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*/
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phy = of_get_next_child(node, NULL);
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if (!phy)
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return -ENODEV;
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need_reset = device_is_compatible(phy, "B5221");
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of_node_put(phy);
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if (!need_reset)
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return 0;
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/* PHY reset is GPIO 29, not in device-tree unfortunately */
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MACIO_OUT8(K2_GPIO_EXTINT_0 + 29,
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KEYLARGO_GPIO_OUTPUT_ENABLE | KEYLARGO_GPIO_OUTOUT_DATA);
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/* Thankfully, this is now always called at a time when we can
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* schedule by sungem.
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*/
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msleep(10);
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MACIO_OUT8(K2_GPIO_EXTINT_0 + 29, 0);
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return 0;
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}
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static long __pmac g5_i2s_enable(struct device_node *node, long param, long value)
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{
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/* Very crude implementation for now */
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struct macio_chip* macio = &macio_chips[0];
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unsigned long flags;
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if (value == 0)
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return 0; /* don't disable yet */
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LOCK(flags);
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MACIO_BIS(KEYLARGO_FCR3, KL3_CLK45_ENABLE | KL3_CLK49_ENABLE |
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KL3_I2S0_CLK18_ENABLE);
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udelay(10);
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MACIO_BIS(KEYLARGO_FCR1, K2_FCR1_I2S0_CELL_ENABLE |
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K2_FCR1_I2S0_CLK_ENABLE_BIT | K2_FCR1_I2S0_ENABLE);
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udelay(10);
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MACIO_BIC(KEYLARGO_FCR1, K2_FCR1_I2S0_RESET);
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UNLOCK(flags);
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udelay(10);
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return 0;
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}
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#ifdef CONFIG_SMP
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static long __pmac g5_reset_cpu(struct device_node* node, long param, long value)
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{
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unsigned int reset_io = 0;
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unsigned long flags;
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struct macio_chip* macio;
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struct device_node* np;
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macio = &macio_chips[0];
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if (macio->type != macio_keylargo2)
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return -ENODEV;
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np = find_path_device("/cpus");
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if (np == NULL)
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return -ENODEV;
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for (np = np->child; np != NULL; np = np->sibling) {
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u32* num = (u32 *)get_property(np, "reg", NULL);
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u32* rst = (u32 *)get_property(np, "soft-reset", NULL);
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if (num == NULL || rst == NULL)
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continue;
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if (param == *num) {
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reset_io = *rst;
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break;
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}
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}
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if (np == NULL || reset_io == 0)
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return -ENODEV;
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LOCK(flags);
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MACIO_OUT8(reset_io, KEYLARGO_GPIO_OUTPUT_ENABLE);
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(void)MACIO_IN8(reset_io);
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udelay(1);
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MACIO_OUT8(reset_io, 0);
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(void)MACIO_IN8(reset_io);
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UNLOCK(flags);
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return 0;
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}
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#endif /* CONFIG_SMP */
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/*
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* This can be called from pmac_smp so isn't static
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*
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* This takes the second CPU off the bus on dual CPU machines
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* running UP
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*/
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void __pmac g5_phy_disable_cpu1(void)
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{
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UN_OUT(U3_API_PHY_CONFIG_1, 0);
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}
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static long __pmac generic_get_mb_info(struct device_node* node, long param, long value)
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{
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switch(param) {
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case PMAC_MB_INFO_MODEL:
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return pmac_mb.model_id;
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case PMAC_MB_INFO_FLAGS:
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return pmac_mb.board_flags;
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case PMAC_MB_INFO_NAME:
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/* hack hack hack... but should work */
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*((const char **)value) = pmac_mb.model_name;
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return 0;
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}
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return -EINVAL;
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}
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/*
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* Table definitions
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*/
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/* Used on any machine
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*/
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static struct feature_table_entry any_features[] __pmacdata = {
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{ PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
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{ 0, NULL }
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};
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/* G5 features
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*/
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static struct feature_table_entry g5_features[] __pmacdata = {
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{ PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
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{ PMAC_FTR_1394_ENABLE, g5_fw_enable },
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{ PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
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{ PMAC_FTR_READ_GPIO, g5_read_gpio },
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{ PMAC_FTR_WRITE_GPIO, g5_write_gpio },
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{ PMAC_FTR_GMAC_PHY_RESET, g5_eth_phy_reset },
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{ PMAC_FTR_SOUND_CHIP_ENABLE, g5_i2s_enable },
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#ifdef CONFIG_SMP
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{ PMAC_FTR_RESET_CPU, g5_reset_cpu },
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#endif /* CONFIG_SMP */
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{ 0, NULL }
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};
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static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
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{ "PowerMac7,2", "PowerMac G5",
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PMAC_TYPE_POWERMAC_G5, g5_features,
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0,
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},
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{ "PowerMac7,3", "PowerMac G5",
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PMAC_TYPE_POWERMAC_G5, g5_features,
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0,
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},
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{ "PowerMac8,1", "iMac G5",
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PMAC_TYPE_IMAC_G5, g5_features,
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0,
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},
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{ "PowerMac9,1", "PowerMac G5",
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PMAC_TYPE_POWERMAC_G5_U3L, g5_features,
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0,
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},
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{ "RackMac3,1", "XServe G5",
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PMAC_TYPE_XSERVE_G5, g5_features,
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0,
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},
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};
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/*
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* The toplevel feature_call callback
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*/
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long __pmac pmac_do_feature_call(unsigned int selector, ...)
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{
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struct device_node* node;
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long param, value;
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int i;
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feature_call func = NULL;
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va_list args;
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if (pmac_mb.features)
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for (i=0; pmac_mb.features[i].function; i++)
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if (pmac_mb.features[i].selector == selector) {
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func = pmac_mb.features[i].function;
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break;
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}
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if (!func)
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for (i=0; any_features[i].function; i++)
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if (any_features[i].selector == selector) {
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func = any_features[i].function;
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break;
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}
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if (!func)
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return -ENODEV;
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va_start(args, selector);
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node = (struct device_node*)va_arg(args, void*);
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param = va_arg(args, long);
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value = va_arg(args, long);
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va_end(args);
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return func(node, param, value);
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}
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static int __init probe_motherboard(void)
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{
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int i;
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struct macio_chip* macio = &macio_chips[0];
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const char* model = NULL;
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struct device_node *dt;
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/* Lookup known motherboard type in device-tree. First try an
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* exact match on the "model" property, then try a "compatible"
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* match is none is found.
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*/
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dt = find_devices("device-tree");
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if (dt != NULL)
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model = (const char *) get_property(dt, "model", NULL);
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for(i=0; model && i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
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if (strcmp(model, pmac_mb_defs[i].model_string) == 0) {
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pmac_mb = pmac_mb_defs[i];
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goto found;
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}
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}
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for(i=0; i<(sizeof(pmac_mb_defs)/sizeof(struct pmac_mb_def)); i++) {
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if (machine_is_compatible(pmac_mb_defs[i].model_string)) {
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pmac_mb = pmac_mb_defs[i];
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goto found;
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}
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}
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/* Fallback to selection depending on mac-io chip type */
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switch(macio->type) {
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case macio_keylargo2:
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pmac_mb.model_id = PMAC_TYPE_UNKNOWN_K2;
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pmac_mb.model_name = "Unknown K2-based";
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pmac_mb.features = g5_features;
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default:
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return -ENODEV;
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}
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found:
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/* Check for "mobile" machine */
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if (model && (strncmp(model, "PowerBook", 9) == 0
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|| strncmp(model, "iBook", 5) == 0))
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pmac_mb.board_flags |= PMAC_MB_MOBILE;
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printk(KERN_INFO "PowerMac motherboard: %s\n", pmac_mb.model_name);
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return 0;
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}
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/* Initialize the Core99 UniNorth host bridge and memory controller
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*/
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static void __init probe_uninorth(void)
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{
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uninorth_node = of_find_node_by_name(NULL, "u3");
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if (uninorth_node && uninorth_node->n_addrs > 0) {
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/* Small hack until I figure out if parsing in prom.c is correct. I should
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* get rid of those pre-parsed junk anyway
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*/
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unsigned long address = uninorth_node->addrs[0].address;
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uninorth_base = ioremap(address, 0x40000);
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uninorth_rev = in_be32(UN_REG(UNI_N_VERSION));
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u3_ht = ioremap(address + U3_HT_CONFIG_BASE, 0x1000);
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} else
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uninorth_node = NULL;
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if (!uninorth_node)
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return;
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printk(KERN_INFO "Found U3 memory controller & host bridge, revision: %d\n",
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uninorth_rev);
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printk(KERN_INFO "Mapped at 0x%08lx\n", (unsigned long)uninorth_base);
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}
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static void __init probe_one_macio(const char* name, const char* compat, int type)
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{
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struct device_node* node;
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int i;
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volatile u32* base;
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u32* revp;
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node = find_devices(name);
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if (!node || !node->n_addrs)
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return;
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if (compat)
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do {
|
|
if (device_is_compatible(node, compat))
|
|
break;
|
|
node = node->next;
|
|
} while (node);
|
|
if (!node)
|
|
return;
|
|
for(i=0; i<MAX_MACIO_CHIPS; i++) {
|
|
if (!macio_chips[i].of_node)
|
|
break;
|
|
if (macio_chips[i].of_node == node)
|
|
return;
|
|
}
|
|
if (i >= MAX_MACIO_CHIPS) {
|
|
printk(KERN_ERR "pmac_feature: Please increase MAX_MACIO_CHIPS !\n");
|
|
printk(KERN_ERR "pmac_feature: %s skipped\n", node->full_name);
|
|
return;
|
|
}
|
|
base = (volatile u32*)ioremap(node->addrs[0].address, node->addrs[0].size);
|
|
if (!base) {
|
|
printk(KERN_ERR "pmac_feature: Can't map mac-io chip !\n");
|
|
return;
|
|
}
|
|
if (type == macio_keylargo) {
|
|
u32* did = (u32 *)get_property(node, "device-id", NULL);
|
|
if (*did == 0x00000025)
|
|
type = macio_pangea;
|
|
if (*did == 0x0000003e)
|
|
type = macio_intrepid;
|
|
}
|
|
macio_chips[i].of_node = node;
|
|
macio_chips[i].type = type;
|
|
macio_chips[i].base = base;
|
|
macio_chips[i].flags = MACIO_FLAG_SCCB_ON | MACIO_FLAG_SCCB_ON;
|
|
macio_chips[i].name = macio_names[type];
|
|
revp = (u32 *)get_property(node, "revision-id", NULL);
|
|
if (revp)
|
|
macio_chips[i].rev = *revp;
|
|
printk(KERN_INFO "Found a %s mac-io controller, rev: %d, mapped at 0x%p\n",
|
|
macio_names[type], macio_chips[i].rev, macio_chips[i].base);
|
|
}
|
|
|
|
static int __init
|
|
probe_macios(void)
|
|
{
|
|
probe_one_macio("mac-io", "K2-Keylargo", macio_keylargo2);
|
|
|
|
macio_chips[0].lbus.index = 0;
|
|
macio_chips[1].lbus.index = 1;
|
|
|
|
return (macio_chips[0].of_node == NULL) ? -ENODEV : 0;
|
|
}
|
|
|
|
static void __init
|
|
set_initial_features(void)
|
|
{
|
|
struct device_node *np;
|
|
|
|
if (macio_chips[0].type == macio_keylargo2) {
|
|
#ifndef CONFIG_SMP
|
|
/* On SMP machines running UP, we have the second CPU eating
|
|
* bus cycles. We need to take it off the bus. This is done
|
|
* from pmac_smp for SMP kernels running on one CPU
|
|
*/
|
|
np = of_find_node_by_type(NULL, "cpu");
|
|
if (np != NULL)
|
|
np = of_find_node_by_type(np, "cpu");
|
|
if (np != NULL) {
|
|
g5_phy_disable_cpu1();
|
|
of_node_put(np);
|
|
}
|
|
#endif /* CONFIG_SMP */
|
|
/* Enable GMAC for now for PCI probing. It will be disabled
|
|
* later on after PCI probe
|
|
*/
|
|
np = of_find_node_by_name(NULL, "ethernet");
|
|
while(np) {
|
|
if (device_is_compatible(np, "K2-GMAC"))
|
|
g5_gmac_enable(np, 0, 1);
|
|
np = of_find_node_by_name(np, "ethernet");
|
|
}
|
|
|
|
/* Enable FW before PCI probe. Will be disabled later on
|
|
* Note: We should have a batter way to check that we are
|
|
* dealing with uninorth internal cell and not a PCI cell
|
|
* on the external PCI. The code below works though.
|
|
*/
|
|
np = of_find_node_by_name(NULL, "firewire");
|
|
while(np) {
|
|
if (device_is_compatible(np, "pci106b,5811")) {
|
|
macio_chips[0].flags |= MACIO_FLAG_FW_SUPPORTED;
|
|
g5_fw_enable(np, 0, 1);
|
|
}
|
|
np = of_find_node_by_name(np, "firewire");
|
|
}
|
|
}
|
|
}
|
|
|
|
void __init
|
|
pmac_feature_init(void)
|
|
{
|
|
/* Detect the UniNorth memory controller */
|
|
probe_uninorth();
|
|
|
|
/* Probe mac-io controllers */
|
|
if (probe_macios()) {
|
|
printk(KERN_WARNING "No mac-io chip found\n");
|
|
return;
|
|
}
|
|
|
|
/* Setup low-level i2c stuffs */
|
|
pmac_init_low_i2c();
|
|
|
|
/* Probe machine type */
|
|
if (probe_motherboard())
|
|
printk(KERN_WARNING "Unknown PowerMac !\n");
|
|
|
|
/* Set some initial features (turn off some chips that will
|
|
* be later turned on)
|
|
*/
|
|
set_initial_features();
|
|
}
|
|
|
|
int __init pmac_feature_late_init(void)
|
|
{
|
|
#if 0
|
|
struct device_node* np;
|
|
|
|
/* Request some resources late */
|
|
if (uninorth_node)
|
|
request_OF_resource(uninorth_node, 0, NULL);
|
|
np = find_devices("hammerhead");
|
|
if (np)
|
|
request_OF_resource(np, 0, NULL);
|
|
np = find_devices("interrupt-controller");
|
|
if (np)
|
|
request_OF_resource(np, 0, NULL);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(pmac_feature_late_init);
|
|
|
|
#if 0
|
|
static void dump_HT_speeds(char *name, u32 cfg, u32 frq)
|
|
{
|
|
int freqs[16] = { 200,300,400,500,600,800,1000,0,0,0,0,0,0,0,0,0 };
|
|
int bits[8] = { 8,16,0,32,2,4,0,0 };
|
|
int freq = (frq >> 8) & 0xf;
|
|
|
|
if (freqs[freq] == 0)
|
|
printk("%s: Unknown HT link frequency %x\n", name, freq);
|
|
else
|
|
printk("%s: %d MHz on main link, (%d in / %d out) bits width\n",
|
|
name, freqs[freq],
|
|
bits[(cfg >> 28) & 0x7], bits[(cfg >> 24) & 0x7]);
|
|
}
|
|
#endif
|
|
|
|
void __init pmac_check_ht_link(void)
|
|
{
|
|
#if 0 /* Disabled for now */
|
|
u32 ufreq, freq, ucfg, cfg;
|
|
struct device_node *pcix_node;
|
|
struct pci_dn *pdn;
|
|
u8 px_bus, px_devfn;
|
|
struct pci_controller *px_hose;
|
|
|
|
(void)in_be32(u3_ht + U3_HT_LINK_COMMAND);
|
|
ucfg = cfg = in_be32(u3_ht + U3_HT_LINK_CONFIG);
|
|
ufreq = freq = in_be32(u3_ht + U3_HT_LINK_FREQ);
|
|
dump_HT_speeds("U3 HyperTransport", cfg, freq);
|
|
|
|
pcix_node = of_find_compatible_node(NULL, "pci", "pci-x");
|
|
if (pcix_node == NULL) {
|
|
printk("No PCI-X bridge found\n");
|
|
return;
|
|
}
|
|
pdn = pcix_node->data;
|
|
px_hose = pdn->phb;
|
|
px_bus = pdn->busno;
|
|
px_devfn = pdn->devfn;
|
|
|
|
early_read_config_dword(px_hose, px_bus, px_devfn, 0xc4, &cfg);
|
|
early_read_config_dword(px_hose, px_bus, px_devfn, 0xcc, &freq);
|
|
dump_HT_speeds("PCI-X HT Uplink", cfg, freq);
|
|
early_read_config_dword(px_hose, px_bus, px_devfn, 0xc8, &cfg);
|
|
early_read_config_dword(px_hose, px_bus, px_devfn, 0xd0, &freq);
|
|
dump_HT_speeds("PCI-X HT Downlink", cfg, freq);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Early video resume hook
|
|
*/
|
|
|
|
static void (*pmac_early_vresume_proc)(void *data) __pmacdata;
|
|
static void *pmac_early_vresume_data __pmacdata;
|
|
|
|
void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
|
|
{
|
|
if (_machine != _MACH_Pmac)
|
|
return;
|
|
preempt_disable();
|
|
pmac_early_vresume_proc = proc;
|
|
pmac_early_vresume_data = data;
|
|
preempt_enable();
|
|
}
|
|
EXPORT_SYMBOL(pmac_set_early_video_resume);
|
|
|
|
|
|
/*
|
|
* AGP related suspend/resume code
|
|
*/
|
|
|
|
static struct pci_dev *pmac_agp_bridge __pmacdata;
|
|
static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata;
|
|
static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata;
|
|
|
|
void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
|
|
int (*suspend)(struct pci_dev *bridge),
|
|
int (*resume)(struct pci_dev *bridge))
|
|
{
|
|
if (suspend || resume) {
|
|
pmac_agp_bridge = bridge;
|
|
pmac_agp_suspend = suspend;
|
|
pmac_agp_resume = resume;
|
|
return;
|
|
}
|
|
if (bridge != pmac_agp_bridge)
|
|
return;
|
|
pmac_agp_suspend = pmac_agp_resume = NULL;
|
|
return;
|
|
}
|
|
EXPORT_SYMBOL(pmac_register_agp_pm);
|
|
|
|
void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
|
|
{
|
|
if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
|
|
return;
|
|
if (pmac_agp_bridge->bus != dev->bus)
|
|
return;
|
|
pmac_agp_suspend(pmac_agp_bridge);
|
|
}
|
|
EXPORT_SYMBOL(pmac_suspend_agp_for_card);
|
|
|
|
void __pmac pmac_resume_agp_for_card(struct pci_dev *dev)
|
|
{
|
|
if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
|
|
return;
|
|
if (pmac_agp_bridge->bus != dev->bus)
|
|
return;
|
|
pmac_agp_resume(pmac_agp_bridge);
|
|
}
|
|
EXPORT_SYMBOL(pmac_resume_agp_for_card);
|