3b7a86c2f0
The memory mapping for the Osiris machine are all off by one bit, and the base address has been fixed for writing (bit25 is being checked by the write, but not on read) Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
40 lines
1.2 KiB
C
40 lines
1.2 KiB
C
/* linux/include/asm-arm/arch-s3c2410/osiris-map.h
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*
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* (c) 2005 Simtec Electronics
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* http://www.simtec.co.uk/products/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* OSIRIS - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/* needs arch/map.h including with this */
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#ifndef __ASM_ARCH_OSIRISMAP_H
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#define __ASM_ARCH_OSIRISMAP_H
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/* start peripherals off after the S3C2410 */
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#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000))
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#define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26))
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/* we put the CPLD registers next, to get them out of the way */
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#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000)
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#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD)
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#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000)
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#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23))
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#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000)
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#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23))
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#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000)
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#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23))
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#endif /* __ASM_ARCH_OSIRISMAP_H */
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