6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
100 lines
2.7 KiB
C
100 lines
2.7 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Galileo Technology chip interrupt handler
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*/
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <asm/ptrace.h>
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#include <asm/gt64120.h>
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/*
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* These are interrupt handlers for the GT on-chip interrupts. They all come
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* in to the MIPS on a single interrupt line, and have to be handled and ack'ed
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* differently than other MIPS interrupts.
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*/
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static void gt64120_irq(int irq, void *dev_id, struct pt_regs *regs)
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{
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unsigned int irq_src, int_high_src, irq_src_mask, int_high_src_mask;
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int handled = 0;
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irq_src = GT_READ(GT_INTRCAUSE_OFS);
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irq_src_mask = GT_READ(GT_INTRMASK_OFS);
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int_high_src = GT_READ(GT_HINTRCAUSE_OFS);
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int_high_src_mask = GT_READ(GT_HINTRMASK_OFS);
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irq_src = irq_src & irq_src_mask;
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int_high_src = int_high_src & int_high_src_mask;
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if (irq_src & 0x00000800) { /* Check for timer interrupt */
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handled = 1;
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irq_src &= ~0x00000800;
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do_timer(regs);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(regs));
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#endif
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}
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GT_WRITE(GT_INTRCAUSE_OFS, 0);
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GT_WRITE(GT_HINTRCAUSE_OFS, 0);
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}
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/*
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* Initializes timer using galileo's built in timer.
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*/
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#ifdef CONFIG_SYSCLK_100
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#define Sys_clock (100 * 1000000) // 100 MHz
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#endif
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#ifdef CONFIG_SYSCLK_83
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#define Sys_clock (83.333 * 1000000) // 83.333 MHz
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#endif
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#ifdef CONFIG_SYSCLK_75
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#define Sys_clock (75 * 1000000) // 75 MHz
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#endif
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/*
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* This will ignore the standard MIPS timer interrupt handler that is passed in
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* as *irq (=irq0 in ../kernel/time.c). We will do our own timer interrupt
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* handling.
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*/
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void gt64120_time_init(void)
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{
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static struct irqaction timer;
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/* Disable timer first */
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GT_WRITE(GT_TC_CONTROL_OFS, 0);
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/* Load timer value for 100 Hz */
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GT_WRITE(GT_TC3_OFS, Sys_clock / 100);
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/*
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* Create the IRQ structure entry for the timer. Since we're too early
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* in the boot process to use the "request_irq()" call, we'll hard-code
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* the values to the correct interrupt line.
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*/
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timer.handler = gt64120_irq;
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timer.flags = SA_SHIRQ | SA_INTERRUPT;
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timer.name = "timer";
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timer.dev_id = NULL;
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timer.next = NULL;
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timer.mask = CPU_MASK_NONE;
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irq_desc[GT_TIMER].action = &timer;
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enable_irq(GT_TIMER);
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/* Enable timer ints */
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GT_WRITE(GT_TC_CONTROL_OFS, 0xc0);
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/* clear Cause register first */
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GT_WRITE(GT_INTRCAUSE_OFS, 0x0);
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/* Unmask timer int */
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GT_WRITE(GT_INTRMASK_OFS, 0x800);
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/* Clear High int register */
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GT_WRITE(GT_HINTRCAUSE_OFS, 0x0);
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/* Mask All interrupts at High cause interrupt */
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GT_WRITE(GT_HINTRMASK_OFS, 0x0);
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}
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