6ae5e8d759
in_nmi shifted down a few labels, so we were inadvertently clearing the lower byte of do_syscall_trace, badness ensues. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
841 lines
17 KiB
ArmAsm
841 lines
17 KiB
ArmAsm
/* $Id: entry.S,v 1.37 2004/06/11 13:02:46 doyu Exp $
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*
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* linux/arch/sh/entry.S
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*
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* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
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* Copyright (C) 2003 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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*/
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#include <linux/sys.h>
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/cpu/mmu_context.h>
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#include <asm/unistd.h>
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#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE)
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#define sys_nfsservctl sys_ni_syscall
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#endif
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#if !defined(CONFIG_MMU)
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#define sys_madvise sys_ni_syscall
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#define sys_readahead sys_ni_syscall
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#define sys_mprotect sys_ni_syscall
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#define sys_msync sys_ni_syscall
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#define sys_mlock sys_ni_syscall
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#define sys_munlock sys_ni_syscall
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#define sys_mlockall sys_ni_syscall
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#define sys_munlockall sys_ni_syscall
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#define sys_mremap sys_ni_syscall
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#define sys_mincore sys_ni_syscall
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#define sys_remap_file_pages sys_ni_syscall
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#endif
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! NOTE:
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! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
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! to be jumped is too far, but it causes illegal slot exception.
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/*
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* entry.S contains the system-call and fault low-level handling routines.
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* This also contains the timer-interrupt handler, as well as all interrupts
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* and faults that can result in a task-switch.
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*
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* NOTE: This code handles signal-recognition, which happens every time
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* after a timer-interrupt and after each system call.
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*
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* NOTE: This code uses a convention that instructions in the delay slot
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* of a transfer-control instruction are indented by an extra space, thus:
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*
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* jmp @k0 ! control-transfer instruction
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* ldc k1, ssr ! delay slot
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*
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* Stack layout in 'ret_from_syscall':
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* ptrace needs to have all regs on the stack.
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* if the order here is changed, it needs to be
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* updated in ptrace.c and ptrace.h
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*
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* r0
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* ...
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* r15 = stack pointer
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* spc
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* pr
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* ssr
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* gbr
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* mach
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* macl
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* syscall #
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*
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*/
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ENOSYS = 38
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EINVAL = 22
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#if defined(CONFIG_KGDB_NMI)
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NMI_VEC = 0x1c0 ! Must catch early for debounce
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#endif
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/* Offsets to the stack */
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OFF_R0 = 0 /* Return value. New ABI also arg4 */
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OFF_R1 = 4 /* New ABI: arg5 */
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OFF_R2 = 8 /* New ABI: arg6 */
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OFF_R3 = 12 /* New ABI: syscall_nr */
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OFF_R4 = 16 /* New ABI: arg0 */
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OFF_R5 = 20 /* New ABI: arg1 */
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OFF_R6 = 24 /* New ABI: arg2 */
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OFF_R7 = 28 /* New ABI: arg3 */
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OFF_SP = (15*4)
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OFF_PC = (16*4)
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OFF_SR = (16*4+8)
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OFF_TRA = (16*4+6*4)
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#define k0 r0
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#define k1 r1
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#define k2 r2
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#define k3 r3
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#define k4 r4
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#define k_ex_code r2_bank /* r2_bank1 */
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#define g_imask r6 /* r6_bank1 */
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#define k_g_imask r6_bank /* r6_bank1 */
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#define current r7 /* r7_bank1 */
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/*
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* Kernel mode register usage:
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* k0 scratch
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* k1 scratch
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* k2 scratch (Exception code)
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* k3 scratch (Return address)
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* k4 scratch
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* k5 reserved
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* k6 Global Interrupt Mask (0--15 << 4)
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* k7 CURRENT_THREAD_INFO (pointer to current thread info)
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*/
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!
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! TLB Miss / Initial Page write exception handling
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! _and_
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! TLB hits, but the access violate the protection.
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! It can be valid access, such as stack grow and/or C-O-W.
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!
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!
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! Find the pmd/pte entry and loadtlb
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! If it's not found, cause address error (SEGV)
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!
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! Although this could be written in assembly language (and it'd be faster),
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! this first version depends *much* on C implementation.
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!
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#define CLI() \
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stc sr, r0; \
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or #0xf0, r0; \
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ldc r0, sr
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#define STI() \
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mov.l __INV_IMASK, r11; \
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stc sr, r10; \
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and r11, r10; \
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stc k_g_imask, r11; \
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or r11, r10; \
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ldc r10, sr
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#if defined(CONFIG_PREEMPT)
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# define preempt_stop() CLI()
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#else
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# define preempt_stop()
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# define resume_kernel restore_all
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#endif
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#if defined(CONFIG_MMU)
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.align 2
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ENTRY(tlb_miss_load)
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bra call_dpf
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mov #0, r5
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.align 2
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ENTRY(tlb_miss_store)
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bra call_dpf
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mov #1, r5
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.align 2
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ENTRY(initial_page_write)
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bra call_dpf
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mov #1, r5
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.align 2
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ENTRY(tlb_protection_violation_load)
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bra call_dpf
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mov #0, r5
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.align 2
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ENTRY(tlb_protection_violation_store)
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bra call_dpf
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mov #1, r5
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call_dpf:
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mov.l 1f, r0
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mov r5, r8
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mov.l @r0, r6
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mov r6, r9
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mov.l 2f, r0
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sts pr, r10
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jsr @r0
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mov r15, r4
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!
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tst r0, r0
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bf/s 0f
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lds r10, pr
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rts
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nop
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0: STI()
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mov.l 3f, r0
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mov r9, r6
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mov r8, r5
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jmp @r0
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mov r15, r4
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.align 2
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1: .long MMU_TEA
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2: .long __do_page_fault
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3: .long do_page_fault
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.align 2
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ENTRY(address_error_load)
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bra call_dae
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mov #0,r5 ! writeaccess = 0
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.align 2
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ENTRY(address_error_store)
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bra call_dae
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mov #1,r5 ! writeaccess = 1
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.align 2
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call_dae:
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mov.l 1f, r0
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mov.l @r0, r6 ! address
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mov.l 2f, r0
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jmp @r0
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mov r15, r4 ! regs
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.align 2
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1: .long MMU_TEA
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2: .long do_address_error
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#endif /* CONFIG_MMU */
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#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
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! Handle kernel debug if either kgdb (SW) or gdb-stub (FW) is present.
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! If both are configured, handle the debug traps (breakpoints) in SW,
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! but still allow BIOS traps to FW.
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.align 2
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debug_kernel:
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#if defined(CONFIG_SH_STANDARD_BIOS) && defined(CONFIG_SH_KGDB)
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/* Force BIOS call to FW (debug_trap put TRA in r8) */
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mov r8,r0
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shlr2 r0
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cmp/eq #0x3f,r0
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bt debug_kernel_fw
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#endif /* CONFIG_SH_STANDARD_BIOS && CONFIG_SH_KGDB */
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debug_enter:
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#if defined(CONFIG_SH_KGDB)
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/* Jump to kgdb, pass stacked regs as arg */
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debug_kernel_sw:
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mov.l 3f, r0
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jmp @r0
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mov r15, r4
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.align 2
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3: .long kgdb_handle_exception
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#endif /* CONFIG_SH_KGDB */
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#if defined(CONFIG_SH_STANDARD_BIOS)
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/* Unwind the stack and jmp to the debug entry */
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debug_kernel_fw:
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mov.l @r15+, r0
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mov.l @r15+, r1
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mov.l @r15+, r2
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mov.l @r15+, r3
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mov.l @r15+, r4
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mov.l @r15+, r5
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mov.l @r15+, r6
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mov.l @r15+, r7
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stc sr, r8
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mov.l 1f, r9 ! BL =1, RB=1, IMASK=0x0F
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or r9, r8
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ldc r8, sr ! here, change the register bank
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mov.l @r15+, r8
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mov.l @r15+, r9
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mov.l @r15+, r10
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mov.l @r15+, r11
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mov.l @r15+, r12
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mov.l @r15+, r13
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mov.l @r15+, r14
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mov.l @r15+, k0
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ldc.l @r15+, spc
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lds.l @r15+, pr
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mov.l @r15+, k1
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ldc.l @r15+, gbr
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lds.l @r15+, mach
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lds.l @r15+, macl
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mov k0, r15
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!
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mov.l 2f, k0
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mov.l @k0, k0
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jmp @k0
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ldc k1, ssr
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.align 2
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1: .long 0x300000f0
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2: .long gdb_vbr_vector
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#endif /* CONFIG_SH_STANDARD_BIOS */
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#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
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.align 2
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debug_trap:
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#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
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mov #OFF_SR, r0
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mov.l @(r0,r15), r0 ! get status register
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shll r0
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shll r0 ! kernel space?
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bt/s debug_kernel
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#endif
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mov.l @r15, r0 ! Restore R0 value
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mov.l 1f, r8
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jmp @r8
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nop
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.align 2
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ENTRY(exception_error)
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!
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STI()
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mov.l 2f, r0
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jmp @r0
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nop
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!
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.align 2
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1: .long break_point_trap_software
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2: .long do_exception_error
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.align 2
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ret_from_exception:
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preempt_stop()
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ret_from_irq:
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!
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mov #OFF_SR, r0
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mov.l @(r0,r15), r0 ! get status register
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shll r0
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shll r0 ! kernel space?
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bt/s resume_kernel ! Yes, it's from kernel, go back soon
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GET_THREAD_INFO(r8)
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#ifdef CONFIG_PREEMPT
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bra resume_userspace
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nop
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ENTRY(resume_kernel)
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mov.l @(TI_PRE_COUNT,r8), r0 ! current_thread_info->preempt_count
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tst r0, r0
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bf noresched
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need_resched:
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mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
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tst #_TIF_NEED_RESCHED, r0 ! need_resched set?
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bt noresched
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mov #OFF_SR, r0
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mov.l @(r0,r15), r0 ! get status register
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and #0xf0, r0 ! interrupts off (exception path)?
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cmp/eq #0xf0, r0
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bt noresched
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mov.l 1f, r0
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mov.l r0, @(TI_PRE_COUNT,r8)
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STI()
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mov.l 2f, r0
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jsr @r0
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nop
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mov #0, r0
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mov.l r0, @(TI_PRE_COUNT,r8)
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CLI()
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bra need_resched
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nop
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noresched:
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bra restore_all
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nop
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.align 2
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1: .long PREEMPT_ACTIVE
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2: .long schedule
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#endif
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ENTRY(resume_userspace)
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! r8: current_thread_info
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CLI()
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mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
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tst #_TIF_WORK_MASK, r0
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bt/s restore_all
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tst #_TIF_NEED_RESCHED, r0
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.align 2
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work_pending:
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! r0: current_thread_info->flags
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! r8: current_thread_info
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! t: result of "tst #_TIF_NEED_RESCHED, r0"
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bf/s work_resched
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tst #_TIF_SIGPENDING, r0
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work_notifysig:
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bt/s restore_all
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mov r15, r4
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mov #0, r5
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mov.l 2f, r1
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mova restore_all, r0
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jmp @r1
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lds r0, pr
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work_resched:
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#ifndef CONFIG_PREEMPT
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! gUSA handling
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mov.l @(OFF_SP,r15), r0 ! get user space stack pointer
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mov r0, r1
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shll r0
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bf/s 1f
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shll r0
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bf/s 1f
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mov #OFF_PC, r0
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! SP >= 0xc0000000 : gUSA mark
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mov.l @(r0,r15), r2 ! get user space PC (program counter)
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mov.l @(OFF_R0,r15), r3 ! end point
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cmp/hs r3, r2 ! r2 >= r3?
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bt 1f
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add r3, r1 ! rewind point #2
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mov.l r1, @(r0,r15) ! reset PC to rewind point #2
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!
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1:
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#endif
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mov.l 1f, r1
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jsr @r1 ! schedule
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nop
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CLI()
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!
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mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
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tst #_TIF_WORK_MASK, r0
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bt restore_all
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bra work_pending
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tst #_TIF_NEED_RESCHED, r0
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.align 2
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1: .long schedule
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2: .long do_signal
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.align 2
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syscall_exit_work:
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! r0: current_thread_info->flags
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! r8: current_thread_info
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tst #_TIF_SYSCALL_TRACE, r0
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bt/s work_pending
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tst #_TIF_NEED_RESCHED, r0
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STI()
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! XXX setup arguments...
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mov.l 4f, r0 ! do_syscall_trace
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jsr @r0
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nop
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bra resume_userspace
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nop
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.align 2
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syscall_trace_entry:
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! Yes it is traced.
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! XXX setup arguments...
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mov.l 4f, r11 ! Call do_syscall_trace which notifies
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jsr @r11 ! superior (will chomp R[0-7])
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nop
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! Reload R0-R4 from kernel stack, where the
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! parent may have modified them using
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! ptrace(POKEUSR). (Note that R0-R2 are
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! used by the system call handler directly
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! from the kernel stack anyway, so don't need
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! to be reloaded here.) This allows the parent
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! to rewrite system calls and args on the fly.
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mov.l @(OFF_R4,r15), r4 ! arg0
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mov.l @(OFF_R5,r15), r5
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mov.l @(OFF_R6,r15), r6
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mov.l @(OFF_R7,r15), r7 ! arg3
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mov.l @(OFF_R3,r15), r3 ! syscall_nr
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! Arrange for do_syscall_trace to be called
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! again as the system call returns.
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mov.l 2f, r10 ! Number of syscalls
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cmp/hs r10, r3
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bf syscall_call
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mov #-ENOSYS, r0
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bra syscall_exit
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mov.l r0, @(OFF_R0,r15) ! Return value
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/*
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* Syscall interface:
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*
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* Syscall #: R3
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* Arguments #0 to #3: R4--R7
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* Arguments #4 to #6: R0, R1, R2
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* TRA: (number of arguments + 0x10) x 4
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*
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* This code also handles delegating other traps to the BIOS/gdb stub
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* according to:
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*
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* Trap number
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* (TRA>>2) Purpose
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* -------- -------
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* 0x0-0xf old syscall ABI
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* 0x10-0x1f new syscall ABI
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* 0x20-0xff delegated through debug_trap to BIOS/gdb stub.
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*
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* Note: When we're first called, the TRA value must be shifted
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* right 2 bits in order to get the value that was used as the "trapa"
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* argument.
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*/
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.align 2
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.globl ret_from_fork
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ret_from_fork:
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mov.l 1f, r8
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jsr @r8
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mov r0, r4
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bra syscall_exit
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nop
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.align 2
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1: .long schedule_tail
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!
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ENTRY(system_call)
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mov.l 1f, r9
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mov.l @r9, r8 ! Read from TRA (Trap Address) Register
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!
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! Is the trap argument >= 0x20? (TRA will be >= 0x80)
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mov #0x7f, r9
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cmp/hi r9, r8
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bt/s 0f
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mov #OFF_TRA, r9
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add r15, r9
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!
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mov.l r8, @r9 ! set TRA value to tra
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STI()
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! Call the system call handler through the table.
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! First check for bad syscall number
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mov r3, r9
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mov.l 2f, r8 ! Number of syscalls
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|
cmp/hs r8, r9
|
|
bf/s good_system_call
|
|
GET_THREAD_INFO(r8)
|
|
syscall_badsys: ! Bad syscall number
|
|
mov #-ENOSYS, r0
|
|
bra resume_userspace
|
|
mov.l r0, @(OFF_R0,r15) ! Return value
|
|
!
|
|
0:
|
|
bra debug_trap
|
|
nop
|
|
!
|
|
good_system_call: ! Good syscall number
|
|
mov.l @(TI_FLAGS,r8), r8
|
|
mov #_TIF_SYSCALL_TRACE, r10
|
|
tst r10, r8
|
|
bf syscall_trace_entry
|
|
!
|
|
syscall_call:
|
|
shll2 r9 ! x4
|
|
mov.l 3f, r8 ! Load the address of sys_call_table
|
|
add r8, r9
|
|
mov.l @r9, r8
|
|
jsr @r8 ! jump to specific syscall handler
|
|
nop
|
|
mov.l r0, @(OFF_R0,r15) ! save the return value
|
|
!
|
|
syscall_exit:
|
|
CLI()
|
|
!
|
|
GET_THREAD_INFO(r8)
|
|
mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
|
|
tst #_TIF_ALLWORK_MASK, r0
|
|
bf syscall_exit_work
|
|
restore_all:
|
|
mov.l @r15+, r0
|
|
mov.l @r15+, r1
|
|
mov.l @r15+, r2
|
|
mov.l @r15+, r3
|
|
mov.l @r15+, r4
|
|
mov.l @r15+, r5
|
|
mov.l @r15+, r6
|
|
mov.l @r15+, r7
|
|
!
|
|
stc sr, r8
|
|
mov.l 7f, r9
|
|
or r9, r8 ! BL =1, RB=1
|
|
ldc r8, sr ! here, change the register bank
|
|
!
|
|
mov.l @r15+, r8
|
|
mov.l @r15+, r9
|
|
mov.l @r15+, r10
|
|
mov.l @r15+, r11
|
|
mov.l @r15+, r12
|
|
mov.l @r15+, r13
|
|
mov.l @r15+, r14
|
|
mov.l @r15+, k4 ! original stack pointer
|
|
ldc.l @r15+, spc
|
|
lds.l @r15+, pr
|
|
mov.l @r15+, k3 ! original SR
|
|
ldc.l @r15+, gbr
|
|
lds.l @r15+, mach
|
|
lds.l @r15+, macl
|
|
add #4, r15 ! Skip syscall number
|
|
!
|
|
#ifdef CONFIG_SH_DSP
|
|
mov.l @r15+, k0 ! DSP mode marker
|
|
mov.l 5f, k1
|
|
cmp/eq k0, k1 ! Do we have a DSP stack frame?
|
|
bf skip_restore
|
|
|
|
stc sr, k0 ! Enable CPU DSP mode
|
|
or k1, k0 ! (within kernel it may be disabled)
|
|
ldc k0, sr
|
|
mov r2, k0 ! Backup r2
|
|
|
|
! Restore DSP registers from stack
|
|
mov r15, r2
|
|
movs.l @r2+, a1
|
|
movs.l @r2+, a0g
|
|
movs.l @r2+, a1g
|
|
movs.l @r2+, m0
|
|
movs.l @r2+, m1
|
|
mov r2, r15
|
|
|
|
lds.l @r15+, a0
|
|
lds.l @r15+, x0
|
|
lds.l @r15+, x1
|
|
lds.l @r15+, y0
|
|
lds.l @r15+, y1
|
|
lds.l @r15+, dsr
|
|
ldc.l @r15+, rs
|
|
ldc.l @r15+, re
|
|
ldc.l @r15+, mod
|
|
|
|
mov k0, r2 ! Restore r2
|
|
skip_restore:
|
|
#endif
|
|
!
|
|
! Calculate new SR value
|
|
mov k3, k2 ! original SR value
|
|
mov.l 9f, k1
|
|
and k1, k2 ! Mask orignal SR value
|
|
!
|
|
mov k3, k0 ! Calculate IMASK-bits
|
|
shlr2 k0
|
|
and #0x3c, k0
|
|
cmp/eq #0x3c, k0
|
|
bt/s 6f
|
|
shll2 k0
|
|
mov g_imask, k0
|
|
!
|
|
6: or k0, k2 ! Set the IMASK-bits
|
|
ldc k2, ssr
|
|
!
|
|
#if defined(CONFIG_KGDB_NMI)
|
|
! Clear in_nmi
|
|
mov.l 6f, k0
|
|
mov #0, k1
|
|
mov.b k1, @k0
|
|
#endif
|
|
mov.l @r15+, k2 ! restore EXPEVT
|
|
mov k4, r15
|
|
rte
|
|
nop
|
|
|
|
.align 2
|
|
1: .long TRA
|
|
2: .long NR_syscalls
|
|
3: .long sys_call_table
|
|
4: .long do_syscall_trace
|
|
5: .long 0x00001000 ! DSP
|
|
7: .long 0x30000000
|
|
9:
|
|
__INV_IMASK:
|
|
.long 0xffffff0f ! ~(IMASK)
|
|
|
|
! Exception Vector Base
|
|
!
|
|
! Should be aligned page boundary.
|
|
!
|
|
.balign 4096,0,4096
|
|
ENTRY(vbr_base)
|
|
.long 0
|
|
!
|
|
.balign 256,0,256
|
|
general_exception:
|
|
mov.l 1f, k2
|
|
mov.l 2f, k3
|
|
bra handle_exception
|
|
mov.l @k2, k2
|
|
.align 2
|
|
1: .long EXPEVT
|
|
2: .long ret_from_exception
|
|
!
|
|
!
|
|
.balign 1024,0,1024
|
|
tlb_miss:
|
|
mov.l 1f, k2
|
|
mov.l 4f, k3
|
|
bra handle_exception
|
|
mov.l @k2, k2
|
|
!
|
|
.balign 512,0,512
|
|
interrupt:
|
|
mov.l 2f, k2
|
|
mov.l 3f, k3
|
|
#if defined(CONFIG_KGDB_NMI)
|
|
! Debounce (filter nested NMI)
|
|
mov.l @k2, k0
|
|
mov.l 5f, k1
|
|
cmp/eq k1, k0
|
|
bf 0f
|
|
mov.l 6f, k1
|
|
tas.b @k1
|
|
bt 0f
|
|
rte
|
|
nop
|
|
.align 2
|
|
5: .long NMI_VEC
|
|
6: .long in_nmi
|
|
0:
|
|
#endif /* defined(CONFIG_KGDB_NMI) */
|
|
bra handle_exception
|
|
mov.l @k2, k2
|
|
|
|
.align 2
|
|
1: .long EXPEVT
|
|
2: .long INTEVT
|
|
3: .long ret_from_irq
|
|
4: .long ret_from_exception
|
|
|
|
!
|
|
!
|
|
.align 2
|
|
handle_exception:
|
|
! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
|
|
! save all registers onto stack.
|
|
!
|
|
stc ssr, k0 ! Is it from kernel space?
|
|
shll k0 ! Check MD bit (bit30) by shifting it into...
|
|
shll k0 ! ...the T bit
|
|
bt/s 1f ! It's a kernel to kernel transition.
|
|
mov r15, k0 ! save original stack to k0
|
|
/* User space to kernel */
|
|
mov #0x20, k1
|
|
shll8 k1 ! k1 := 8192 (== THREAD_SIZE)
|
|
add current, k1
|
|
mov k1, r15 ! change to kernel stack
|
|
!
|
|
1: mov #-1, k4
|
|
mov.l 2f, k1
|
|
!
|
|
#ifdef CONFIG_SH_DSP
|
|
mov.l r2, @-r15 ! Save r2, we need another reg
|
|
stc sr, k4
|
|
mov.l 1f, r2
|
|
tst r2, k4 ! Check if in DSP mode
|
|
mov.l @r15+, r2 ! Restore r2 now
|
|
bt/s skip_save
|
|
mov #0, k4 ! Set marker for no stack frame
|
|
|
|
mov r2, k4 ! Backup r2 (in k4) for later
|
|
|
|
! Save DSP registers on stack
|
|
stc.l mod, @-r15
|
|
stc.l re, @-r15
|
|
stc.l rs, @-r15
|
|
sts.l dsr, @-r15
|
|
sts.l y1, @-r15
|
|
sts.l y0, @-r15
|
|
sts.l x1, @-r15
|
|
sts.l x0, @-r15
|
|
sts.l a0, @-r15
|
|
|
|
! GAS is broken, does not generate correct "movs.l Ds,@-As" instr.
|
|
|
|
! FIXME: Make sure that this is still the case with newer toolchains,
|
|
! as we're not at all interested in supporting ancient toolchains at
|
|
! this point. -- PFM.
|
|
|
|
mov r15, r2
|
|
.word 0xf653 ! movs.l a1, @-r2
|
|
.word 0xf6f3 ! movs.l a0g, @-r2
|
|
.word 0xf6d3 ! movs.l a1g, @-r2
|
|
.word 0xf6c3 ! movs.l m0, @-r2
|
|
.word 0xf6e3 ! movs.l m1, @-r2
|
|
mov r2, r15
|
|
|
|
mov k4, r2 ! Restore r2
|
|
mov.l 1f, k4 ! Force DSP stack frame
|
|
skip_save:
|
|
mov.l k4, @-r15 ! Push DSP mode marker onto stack
|
|
#endif
|
|
! Save the user registers on the stack.
|
|
mov.l k2, @-r15 ! EXPEVT
|
|
mov.l k4, @-r15 ! set TRA (default: -1)
|
|
!
|
|
sts.l macl, @-r15
|
|
sts.l mach, @-r15
|
|
stc.l gbr, @-r15
|
|
stc.l ssr, @-r15
|
|
sts.l pr, @-r15
|
|
stc.l spc, @-r15
|
|
!
|
|
lds k3, pr ! Set the return address to pr
|
|
!
|
|
mov.l k0, @-r15 ! save orignal stack
|
|
mov.l r14, @-r15
|
|
mov.l r13, @-r15
|
|
mov.l r12, @-r15
|
|
mov.l r11, @-r15
|
|
mov.l r10, @-r15
|
|
mov.l r9, @-r15
|
|
mov.l r8, @-r15
|
|
!
|
|
stc sr, r8 ! Back to normal register bank, and
|
|
or k1, r8 ! Block all interrupts
|
|
mov.l 3f, k1
|
|
and k1, r8 ! ...
|
|
ldc r8, sr ! ...changed here.
|
|
!
|
|
mov.l r7, @-r15
|
|
mov.l r6, @-r15
|
|
mov.l r5, @-r15
|
|
mov.l r4, @-r15
|
|
mov.l r3, @-r15
|
|
mov.l r2, @-r15
|
|
mov.l r1, @-r15
|
|
mov.l r0, @-r15
|
|
! Then, dispatch to the handler, according to the exception code.
|
|
stc k_ex_code, r8
|
|
shlr2 r8
|
|
shlr r8
|
|
mov.l 4f, r9
|
|
add r8, r9
|
|
mov.l @r9, r9
|
|
jmp @r9
|
|
nop
|
|
|
|
.align 2
|
|
1: .long 0x00001000 ! DSP=1
|
|
2: .long 0x000080f0 ! FD=1, IMASK=15
|
|
3: .long 0xcfffffff ! RB=0, BL=0
|
|
4: .long exception_handling_table
|
|
|
|
.align 2
|
|
ENTRY(exception_none)
|
|
rts
|
|
nop
|
|
|