585cf17561
The Marvell Orion is a family of ARM SoCs with a DDR/DDR2 memory controller, 10/100/1000 ethernet MAC, and USB 2.0 interfaces, and, depending on the specific model, PCI-E interface, PCI-X interface, SATA controllers, crypto unit, SPI interface, SDIO interface, device bus, NAND controller, DMA engine and/or XOR engine. This contains the basic structure and architecture register definitions. Signed-off-by: Tzachi Perelstein <tzachi@marvell.com> Reviewed-by: Nicolas Pitre <nico@marvell.com> Reviewed-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
45 lines
852 B
C
45 lines
852 B
C
/*
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* include/asm-arm/arch-orion/uncompress.h
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*
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* Tzachi Perelstein <tzachi@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/arch/orion.h>
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#define MV_UART_LSR ((volatile unsigned char *)(UART0_BASE + 0x14))
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#define MV_UART_THR ((volatile unsigned char *)(UART0_BASE + 0x0))
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#define LSR_THRE 0x20
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static void putc(const char c)
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{
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int j = 0x1000;
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while (--j && !(*MV_UART_LSR & LSR_THRE))
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barrier();
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*MV_UART_THR = c;
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}
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static void flush(void)
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{
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}
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static void orion_early_putstr(const char *ptr)
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{
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char c;
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while ((c = *ptr++) != '\0') {
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if (c == '\n')
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putc('\r');
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putc(c);
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}
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}
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/*
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* nothing to do
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*/
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#define arch_decomp_setup()
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#define arch_decomp_wdog()
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