703e937c83
Enumerate fixed-mode PMCs based on CPUID, and feed that into the perfcounter code. Does not use fixed-mode PMCs yet. Signed-off-by: Ingo Molnar <mingo@elte.hu>
76 lines
1.8 KiB
C
76 lines
1.8 KiB
C
#ifndef _ASM_X86_PERF_COUNTER_H
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#define _ASM_X86_PERF_COUNTER_H
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/*
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* Performance counter hw details:
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*/
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#define X86_PMC_MAX_GENERIC 8
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#define X86_PMC_MAX_FIXED 3
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#define MSR_ARCH_PERFMON_PERFCTR0 0xc1
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#define MSR_ARCH_PERFMON_PERFCTR1 0xc2
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#define MSR_ARCH_PERFMON_EVENTSEL0 0x186
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#define MSR_ARCH_PERFMON_EVENTSEL1 0x187
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#define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22)
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#define ARCH_PERFMON_EVENTSEL_INT (1 << 20)
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#define ARCH_PERFMON_EVENTSEL_OS (1 << 17)
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#define ARCH_PERFMON_EVENTSEL_USR (1 << 16)
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#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c
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#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
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#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX 0
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#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT \
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(1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))
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#define ARCH_PERFMON_BRANCH_MISSES_RETIRED 6
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/*
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* Intel "Architectural Performance Monitoring" CPUID
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* detection/enumeration details:
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*/
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union cpuid10_eax {
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struct {
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unsigned int version_id:8;
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unsigned int num_counters:8;
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unsigned int bit_width:8;
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unsigned int mask_length:8;
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} split;
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unsigned int full;
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};
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union cpuid10_edx {
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struct {
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unsigned int num_counters_fixed:4;
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unsigned int reserved:28;
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} split;
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unsigned int full;
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};
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/*
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* Fixed-purpose performance counters:
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*/
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/* Instr_Retired.Any: */
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#define MSR_ARCH_PERFMON_FIXED_CTR0 0x309
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/* CPU_CLK_Unhalted.Core: */
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#define MSR_ARCH_PERFMON_FIXED_CTR1 0x30a
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/* CPU_CLK_Unhalted.Ref: */
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#define MSR_ARCH_PERFMON_FIXED_CTR2 0x30b
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#ifdef CONFIG_PERF_COUNTERS
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extern void init_hw_perf_counters(void);
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extern void perf_counters_lapic_init(int nmi);
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#else
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static inline void init_hw_perf_counters(void) { }
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static inline void perf_counters_lapic_init(int nmi) { }
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#endif
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#endif /* _ASM_X86_PERF_COUNTER_H */
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