2654d6385f
Added the mpc85xx family of dts files to the powerpc tree Signed-off-by: Paul Mackerras <paulus@samba.org>
288 lines
6.5 KiB
Plaintext
288 lines
6.5 KiB
Plaintext
/*
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* MPC8555 CDS Device Tree Source
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/ {
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model = "MPC8548CDS";
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compatible = "MPC85xxCDS";
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#address-cells = <1>;
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#size-cells = <1>;
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linux,phandle = <100>;
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cpus {
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#cpus = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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linux,phandle = <200>;
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PowerPC,8548@0 {
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device_type = "cpu";
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reg = <0>;
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d-cache-line-size = <20>; // 32 bytes
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i-cache-line-size = <20>; // 32 bytes
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d-cache-size = <8000>; // L1, 32K
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i-cache-size = <8000>; // L1, 32K
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timebase-frequency = <0>; // 33 MHz, from uboot
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bus-frequency = <0>; // 166 MHz
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clock-frequency = <0>; // 825 MHz, from uboot
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32-bit;
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linux,phandle = <201>;
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};
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};
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memory {
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device_type = "memory";
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linux,phandle = <300>;
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reg = <00000000 08000000>; // 128M at 0x0
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};
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soc8548@e0000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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#interrupt-cells = <2>;
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device_type = "soc";
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ranges = <0 e0000000 00100000>;
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reg = <e0000000 00100000>; // CCSRBAR 1M
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bus-frequency = <0>;
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i2c@3000 {
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device_type = "i2c";
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compatible = "fsl-i2c";
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reg = <3000 100>;
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interrupts = <1b 2>;
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interrupt-parent = <40000>;
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dfsrr;
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};
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mdio@24520 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "mdio";
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compatible = "gianfar";
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reg = <24520 20>;
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linux,phandle = <24520>;
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ethernet-phy@0 {
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linux,phandle = <2452000>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <0>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@1 {
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linux,phandle = <2452001>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <1>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@2 {
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linux,phandle = <2452002>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <2>;
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device_type = "ethernet-phy";
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};
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ethernet-phy@3 {
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linux,phandle = <2452003>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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reg = <3>;
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device_type = "ethernet-phy";
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};
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};
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ethernet@24000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <24000 1000>;
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local-mac-address = [ 00 E0 0C 00 73 00 ];
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interrupts = <d 2 e 2 12 2>;
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interrupt-parent = <40000>;
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phy-handle = <2452000>;
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};
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ethernet@25000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <25000 1000>;
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local-mac-address = [ 00 E0 0C 00 73 01 ];
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interrupts = <13 2 14 2 18 2>;
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interrupt-parent = <40000>;
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phy-handle = <2452001>;
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};
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ethernet@26000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <26000 1000>;
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local-mac-address = [ 00 E0 0C 00 73 02 ];
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interrupts = <f 2 10 2 11 2>;
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interrupt-parent = <40000>;
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phy-handle = <2452001>;
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};
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/* eTSEC 4 is currently broken
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ethernet@27000 {
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#address-cells = <1>;
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#size-cells = <0>;
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device_type = "network";
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model = "eTSEC";
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compatible = "gianfar";
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reg = <27000 1000>;
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local-mac-address = [ 00 E0 0C 00 73 03 ];
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interrupts = <15 2 16 2 17 2>;
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interrupt-parent = <40000>;
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phy-handle = <2452001>;
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};
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*/
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serial@4500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <4500 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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};
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serial@4600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <4600 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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};
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pci@8000 {
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linux,phandle = <8000>;
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interrupt-map-mask = <1f800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x10 */
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08000 0 0 1 40000 30 1
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08000 0 0 2 40000 31 1
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08000 0 0 3 40000 32 1
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08000 0 0 4 40000 33 1
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/* IDSEL 0x11 */
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08800 0 0 1 40000 30 1
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08800 0 0 2 40000 31 1
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08800 0 0 3 40000 32 1
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08800 0 0 4 40000 33 1
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/* IDSEL 0x12 (Slot 1) */
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09000 0 0 1 40000 30 1
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09000 0 0 2 40000 31 1
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09000 0 0 3 40000 32 1
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09000 0 0 4 40000 33 1
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/* IDSEL 0x13 (Slot 2) */
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09800 0 0 1 40000 31 1
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09800 0 0 2 40000 32 1
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09800 0 0 3 40000 33 1
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09800 0 0 4 40000 30 1
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/* IDSEL 0x14 (Slot 3) */
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0a000 0 0 1 40000 32 1
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0a000 0 0 2 40000 33 1
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0a000 0 0 3 40000 30 1
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0a000 0 0 4 40000 31 1
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/* IDSEL 0x15 (Slot 4) */
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0a800 0 0 1 40000 33 1
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0a800 0 0 2 40000 30 1
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0a800 0 0 3 40000 31 1
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0a800 0 0 4 40000 32 1
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/* Bus 1 (Tundra Bridge) */
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/* IDSEL 0x12 (ISA bridge) */
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19000 0 0 1 40000 30 1
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19000 0 0 2 40000 31 1
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19000 0 0 3 40000 32 1
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19000 0 0 4 40000 33 1>;
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interrupt-parent = <40000>;
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interrupts = <08 2>;
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bus-range = <0 0>;
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ranges = <02000000 0 80000000 80000000 0 20000000
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01000000 0 00000000 e2000000 0 00100000>;
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clock-frequency = <3f940aa>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <8000 1000>;
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compatible = "85xx";
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device_type = "pci";
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i8259@19000 {
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clock-frequency = <0>;
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interrupt-controller;
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device_type = "interrupt-controller";
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reg = <19000 0 0 0 1>;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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built-in;
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compatible = "chrp,iic";
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big-endian;
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interrupts = <1>;
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interrupt-parent = <8000>;
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};
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};
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pci@9000 {
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linux,phandle = <9000>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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/* IDSEL 0x15 */
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a800 0 0 1 40000 3b 1
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a800 0 0 2 40000 3b 1
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a800 0 0 3 40000 3b 1
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a800 0 0 4 40000 3b 1>;
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interrupt-parent = <40000>;
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interrupts = <09 2>;
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bus-range = <0 0>;
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ranges = <02000000 0 a0000000 a0000000 0 20000000
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01000000 0 00000000 e3000000 0 00100000>;
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clock-frequency = <3f940aa>;
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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reg = <9000 1000>;
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compatible = "85xx";
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device_type = "pci";
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};
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pic@40000 {
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linux,phandle = <40000>;
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clock-frequency = <0>;
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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reg = <40000 40000>;
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built-in;
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compatible = "chrp,open-pic";
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device_type = "open-pic";
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big-endian;
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};
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};
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};
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