c9b3a40ff2
The module init entries should be __init instead of __devinit. Signed-off-by: Takashi Iwai <tiwai@suse.de>
756 lines
18 KiB
C
756 lines
18 KiB
C
/* sound/soc/s3c24xx/s3c2412-i2s.c
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*
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* ALSA Soc Audio Layer - S3C2412 I2S driver
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*
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* Copyright (c) 2006 Wolfson Microelectronics PLC.
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* Graeme Gregory graeme.gregory@wolfsonmicro.com
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* linux@wolfsonmicro.com
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*
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* Copyright (c) 2007, 2004-2005 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <mach/hardware.h>
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#include <linux/io.h>
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#include <asm/dma.h>
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#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
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#include <mach/regs-gpio.h>
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#include <mach/audio.h>
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#include <mach/dma.h>
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#include "s3c24xx-pcm.h"
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#include "s3c2412-i2s.h"
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#define S3C2412_I2S_DEBUG 0
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#define S3C2412_I2S_DEBUG_CON 0
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#if S3C2412_I2S_DEBUG
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#define DBG(x...) printk(KERN_INFO x)
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#else
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#define DBG(x...) do { } while (0)
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#endif
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static struct s3c2410_dma_client s3c2412_dma_client_out = {
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.name = "I2S PCM Stereo out"
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};
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static struct s3c2410_dma_client s3c2412_dma_client_in = {
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.name = "I2S PCM Stereo in"
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};
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static struct s3c24xx_pcm_dma_params s3c2412_i2s_pcm_stereo_out = {
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.client = &s3c2412_dma_client_out,
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.channel = DMACH_I2S_OUT,
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.dma_addr = S3C2410_PA_IIS + S3C2412_IISTXD,
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.dma_size = 4,
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};
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static struct s3c24xx_pcm_dma_params s3c2412_i2s_pcm_stereo_in = {
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.client = &s3c2412_dma_client_in,
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.channel = DMACH_I2S_IN,
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.dma_addr = S3C2410_PA_IIS + S3C2412_IISRXD,
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.dma_size = 4,
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};
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struct s3c2412_i2s_info {
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struct device *dev;
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void __iomem *regs;
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struct clk *iis_clk;
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struct clk *iis_pclk;
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struct clk *iis_cclk;
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u32 suspend_iismod;
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u32 suspend_iiscon;
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u32 suspend_iispsr;
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};
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static struct s3c2412_i2s_info s3c2412_i2s;
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#define bit_set(v, b) (((v) & (b)) ? 1 : 0)
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#if S3C2412_I2S_DEBUG_CON
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static void dbg_showcon(const char *fn, u32 con)
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{
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printk(KERN_DEBUG "%s: LRI=%d, TXFEMPT=%d, RXFEMPT=%d, TXFFULL=%d, RXFFULL=%d\n", fn,
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bit_set(con, S3C2412_IISCON_LRINDEX),
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bit_set(con, S3C2412_IISCON_TXFIFO_EMPTY),
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bit_set(con, S3C2412_IISCON_RXFIFO_EMPTY),
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bit_set(con, S3C2412_IISCON_TXFIFO_FULL),
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bit_set(con, S3C2412_IISCON_RXFIFO_FULL));
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printk(KERN_DEBUG "%s: PAUSE: TXDMA=%d, RXDMA=%d, TXCH=%d, RXCH=%d\n",
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fn,
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bit_set(con, S3C2412_IISCON_TXDMA_PAUSE),
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bit_set(con, S3C2412_IISCON_RXDMA_PAUSE),
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bit_set(con, S3C2412_IISCON_TXCH_PAUSE),
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bit_set(con, S3C2412_IISCON_RXCH_PAUSE));
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printk(KERN_DEBUG "%s: ACTIVE: TXDMA=%d, RXDMA=%d, IIS=%d\n", fn,
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bit_set(con, S3C2412_IISCON_TXDMA_ACTIVE),
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bit_set(con, S3C2412_IISCON_RXDMA_ACTIVE),
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bit_set(con, S3C2412_IISCON_IIS_ACTIVE));
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}
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#else
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static inline void dbg_showcon(const char *fn, u32 con)
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{
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}
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#endif
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/* Turn on or off the transmission path. */
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static void s3c2412_snd_txctrl(int on)
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{
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struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
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void __iomem *regs = i2s->regs;
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u32 fic, con, mod;
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DBG("%s(%d)\n", __func__, on);
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fic = readl(regs + S3C2412_IISFIC);
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con = readl(regs + S3C2412_IISCON);
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mod = readl(regs + S3C2412_IISMOD);
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DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
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if (on) {
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con |= S3C2412_IISCON_TXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
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con &= ~S3C2412_IISCON_TXDMA_PAUSE;
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con &= ~S3C2412_IISCON_TXCH_PAUSE;
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switch (mod & S3C2412_IISMOD_MODE_MASK) {
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case S3C2412_IISMOD_MODE_TXONLY:
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case S3C2412_IISMOD_MODE_TXRX:
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/* do nothing, we are in the right mode */
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break;
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case S3C2412_IISMOD_MODE_RXONLY:
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mod &= ~S3C2412_IISMOD_MODE_MASK;
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mod |= S3C2412_IISMOD_MODE_TXRX;
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break;
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default:
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dev_err(i2s->dev, "TXEN: Invalid MODE in IISMOD\n");
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}
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writel(con, regs + S3C2412_IISCON);
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writel(mod, regs + S3C2412_IISMOD);
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} else {
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/* Note, we do not have any indication that the FIFO problems
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* tha the S3C2410/2440 had apply here, so we should be able
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* to disable the DMA and TX without resetting the FIFOS.
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*/
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con |= S3C2412_IISCON_TXDMA_PAUSE;
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con |= S3C2412_IISCON_TXCH_PAUSE;
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con &= ~S3C2412_IISCON_TXDMA_ACTIVE;
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switch (mod & S3C2412_IISMOD_MODE_MASK) {
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case S3C2412_IISMOD_MODE_TXRX:
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mod &= ~S3C2412_IISMOD_MODE_MASK;
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mod |= S3C2412_IISMOD_MODE_RXONLY;
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break;
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case S3C2412_IISMOD_MODE_TXONLY:
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mod &= ~S3C2412_IISMOD_MODE_MASK;
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con &= ~S3C2412_IISCON_IIS_ACTIVE;
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break;
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default:
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dev_err(i2s->dev, "TXDIS: Invalid MODE in IISMOD\n");
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}
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writel(mod, regs + S3C2412_IISMOD);
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writel(con, regs + S3C2412_IISCON);
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}
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fic = readl(regs + S3C2412_IISFIC);
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dbg_showcon(__func__, con);
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DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
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}
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static void s3c2412_snd_rxctrl(int on)
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{
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struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
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void __iomem *regs = i2s->regs;
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u32 fic, con, mod;
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DBG("%s(%d)\n", __func__, on);
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fic = readl(regs + S3C2412_IISFIC);
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con = readl(regs + S3C2412_IISCON);
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mod = readl(regs + S3C2412_IISMOD);
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DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
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if (on) {
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con |= S3C2412_IISCON_RXDMA_ACTIVE | S3C2412_IISCON_IIS_ACTIVE;
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con &= ~S3C2412_IISCON_RXDMA_PAUSE;
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con &= ~S3C2412_IISCON_RXCH_PAUSE;
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switch (mod & S3C2412_IISMOD_MODE_MASK) {
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case S3C2412_IISMOD_MODE_TXRX:
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case S3C2412_IISMOD_MODE_RXONLY:
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/* do nothing, we are in the right mode */
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break;
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case S3C2412_IISMOD_MODE_TXONLY:
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mod &= ~S3C2412_IISMOD_MODE_MASK;
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mod |= S3C2412_IISMOD_MODE_TXRX;
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break;
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default:
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dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n");
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}
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writel(mod, regs + S3C2412_IISMOD);
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writel(con, regs + S3C2412_IISCON);
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} else {
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/* See txctrl notes on FIFOs. */
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con &= ~S3C2412_IISCON_RXDMA_ACTIVE;
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con |= S3C2412_IISCON_RXDMA_PAUSE;
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con |= S3C2412_IISCON_RXCH_PAUSE;
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switch (mod & S3C2412_IISMOD_MODE_MASK) {
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case S3C2412_IISMOD_MODE_RXONLY:
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con &= ~S3C2412_IISCON_IIS_ACTIVE;
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mod &= ~S3C2412_IISMOD_MODE_MASK;
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break;
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case S3C2412_IISMOD_MODE_TXRX:
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mod &= ~S3C2412_IISMOD_MODE_MASK;
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mod |= S3C2412_IISMOD_MODE_TXONLY;
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break;
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default:
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dev_err(i2s->dev, "RXEN: Invalid MODE in IISMOD\n");
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}
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writel(con, regs + S3C2412_IISCON);
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writel(mod, regs + S3C2412_IISMOD);
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}
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fic = readl(regs + S3C2412_IISFIC);
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DBG("%s: IIS: CON=%x MOD=%x FIC=%x\n", __func__, con, mod, fic);
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}
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/*
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* Wait for the LR signal to allow synchronisation to the L/R clock
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* from the codec. May only be needed for slave mode.
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*/
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static int s3c2412_snd_lrsync(void)
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{
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u32 iiscon;
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unsigned long timeout = jiffies + msecs_to_jiffies(5);
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DBG("Entered %s\n", __func__);
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while (1) {
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iiscon = readl(s3c2412_i2s.regs + S3C2412_IISCON);
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if (iiscon & S3C2412_IISCON_LRINDEX)
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break;
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if (timeout < jiffies) {
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printk(KERN_ERR "%s: timeout\n", __func__);
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return -ETIMEDOUT;
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}
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}
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return 0;
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}
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/*
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* Check whether CPU is the master or slave
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*/
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static inline int s3c2412_snd_is_clkmaster(void)
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{
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u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
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DBG("Entered %s\n", __func__);
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iismod &= S3C2412_IISMOD_MASTER_MASK;
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return !(iismod == S3C2412_IISMOD_SLAVE);
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}
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/*
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* Set S3C2412 I2S DAI format
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*/
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static int s3c2412_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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u32 iismod;
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DBG("Entered %s\n", __func__);
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iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
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DBG("hw_params r: IISMOD: %x \n", iismod);
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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iismod &= ~S3C2412_IISMOD_MASTER_MASK;
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iismod |= S3C2412_IISMOD_SLAVE;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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iismod &= ~S3C2412_IISMOD_MASTER_MASK;
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iismod |= S3C2412_IISMOD_MASTER_INTERNAL;
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break;
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default:
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DBG("unknwon master/slave format\n");
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return -EINVAL;
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}
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iismod &= ~S3C2412_IISMOD_SDF_MASK;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_RIGHT_J:
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iismod |= S3C2412_IISMOD_SDF_MSB;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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iismod |= S3C2412_IISMOD_SDF_LSB;
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break;
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case SND_SOC_DAIFMT_I2S:
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iismod |= S3C2412_IISMOD_SDF_IIS;
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break;
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default:
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DBG("Unknown data format\n");
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return -EINVAL;
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}
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writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
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DBG("hw_params w: IISMOD: %x \n", iismod);
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return 0;
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}
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static int s3c2412_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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u32 iismod;
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DBG("Entered %s\n", __func__);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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rtd->dai->cpu_dai->dma_data = &s3c2412_i2s_pcm_stereo_out;
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else
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rtd->dai->cpu_dai->dma_data = &s3c2412_i2s_pcm_stereo_in;
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/* Working copies of register */
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iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
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DBG("%s: r: IISMOD: %x\n", __func__, iismod);
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8:
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iismod |= S3C2412_IISMOD_8BIT;
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break;
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case SNDRV_PCM_FORMAT_S16_LE:
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iismod &= ~S3C2412_IISMOD_8BIT;
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break;
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}
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writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
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DBG("%s: w: IISMOD: %x\n", __func__, iismod);
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return 0;
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}
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static int s3c2412_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
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unsigned long irqs;
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int ret = 0;
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DBG("Entered %s\n", __func__);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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/* On start, ensure that the FIFOs are cleared and reset. */
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writel(capture ? S3C2412_IISFIC_RXFLUSH : S3C2412_IISFIC_TXFLUSH,
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s3c2412_i2s.regs + S3C2412_IISFIC);
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/* clear again, just in case */
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writel(0x0, s3c2412_i2s.regs + S3C2412_IISFIC);
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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if (!s3c2412_snd_is_clkmaster()) {
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ret = s3c2412_snd_lrsync();
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if (ret)
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goto exit_err;
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}
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local_irq_save(irqs);
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if (capture)
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s3c2412_snd_rxctrl(1);
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else
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s3c2412_snd_txctrl(1);
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local_irq_restore(irqs);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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local_irq_save(irqs);
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if (capture)
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s3c2412_snd_rxctrl(0);
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else
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s3c2412_snd_txctrl(0);
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local_irq_restore(irqs);
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break;
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default:
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ret = -EINVAL;
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break;
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}
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exit_err:
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return ret;
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}
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/* default table of all avaialable root fs divisors */
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static unsigned int s3c2412_iis_fs[] = { 256, 512, 384, 768, 0 };
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int s3c2412_iis_calc_rate(struct s3c2412_rate_calc *info,
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unsigned int *fstab,
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unsigned int rate, struct clk *clk)
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{
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unsigned long clkrate = clk_get_rate(clk);
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unsigned int div;
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unsigned int fsclk;
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unsigned int actual;
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unsigned int fs;
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unsigned int fsdiv;
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signed int deviation = 0;
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unsigned int best_fs = 0;
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unsigned int best_div = 0;
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unsigned int best_rate = 0;
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unsigned int best_deviation = INT_MAX;
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if (fstab == NULL)
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fstab = s3c2412_iis_fs;
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for (fs = 0;; fs++) {
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fsdiv = s3c2412_iis_fs[fs];
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if (fsdiv == 0)
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break;
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fsclk = clkrate / fsdiv;
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div = fsclk / rate;
|
|
|
|
if ((fsclk % rate) > (rate / 2))
|
|
div++;
|
|
|
|
if (div <= 1)
|
|
continue;
|
|
|
|
actual = clkrate / (fsdiv * div);
|
|
deviation = actual - rate;
|
|
|
|
printk(KERN_DEBUG "%dfs: div %d => result %d, deviation %d\n",
|
|
fsdiv, div, actual, deviation);
|
|
|
|
deviation = abs(deviation);
|
|
|
|
if (deviation < best_deviation) {
|
|
best_fs = fsdiv;
|
|
best_div = div;
|
|
best_rate = actual;
|
|
best_deviation = deviation;
|
|
}
|
|
|
|
if (deviation == 0)
|
|
break;
|
|
}
|
|
|
|
printk(KERN_DEBUG "best: fs=%d, div=%d, rate=%d\n",
|
|
best_fs, best_div, best_rate);
|
|
|
|
info->fs_div = best_fs;
|
|
info->clk_div = best_div;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(s3c2412_iis_calc_rate);
|
|
|
|
/*
|
|
* Set S3C2412 Clock source
|
|
*/
|
|
static int s3c2412_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
|
|
int clk_id, unsigned int freq, int dir)
|
|
{
|
|
u32 iismod = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
|
|
|
|
DBG("%s(%p, %d, %u, %d)\n", __func__, cpu_dai, clk_id,
|
|
freq, dir);
|
|
|
|
switch (clk_id) {
|
|
case S3C2412_CLKSRC_PCLK:
|
|
iismod &= ~S3C2412_IISMOD_MASTER_MASK;
|
|
iismod |= S3C2412_IISMOD_MASTER_INTERNAL;
|
|
break;
|
|
case S3C2412_CLKSRC_I2SCLK:
|
|
iismod &= ~S3C2412_IISMOD_MASTER_MASK;
|
|
iismod |= S3C2412_IISMOD_MASTER_EXTERNAL;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
writel(iismod, s3c2412_i2s.regs + S3C2412_IISMOD);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Set S3C2412 Clock dividers
|
|
*/
|
|
static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai,
|
|
int div_id, int div)
|
|
{
|
|
struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
|
|
u32 reg;
|
|
|
|
DBG("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div);
|
|
|
|
switch (div_id) {
|
|
case S3C2412_DIV_BCLK:
|
|
reg = readl(i2s->regs + S3C2412_IISMOD);
|
|
reg &= ~S3C2412_IISMOD_BCLK_MASK;
|
|
writel(reg | div, i2s->regs + S3C2412_IISMOD);
|
|
|
|
DBG("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
|
|
break;
|
|
|
|
case S3C2412_DIV_RCLK:
|
|
if (div > 3) {
|
|
/* convert value to bit field */
|
|
|
|
switch (div) {
|
|
case 256:
|
|
div = S3C2412_IISMOD_RCLK_256FS;
|
|
break;
|
|
|
|
case 384:
|
|
div = S3C2412_IISMOD_RCLK_384FS;
|
|
break;
|
|
|
|
case 512:
|
|
div = S3C2412_IISMOD_RCLK_512FS;
|
|
break;
|
|
|
|
case 768:
|
|
div = S3C2412_IISMOD_RCLK_768FS;
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
}
|
|
|
|
reg = readl(s3c2412_i2s.regs + S3C2412_IISMOD);
|
|
reg &= ~S3C2412_IISMOD_RCLK_MASK;
|
|
writel(reg | div, i2s->regs + S3C2412_IISMOD);
|
|
DBG("%s: MOD=%08x\n", __func__, readl(i2s->regs + S3C2412_IISMOD));
|
|
break;
|
|
|
|
case S3C2412_DIV_PRESCALER:
|
|
if (div >= 0) {
|
|
writel((div << 8) | S3C2412_IISPSR_PSREN,
|
|
i2s->regs + S3C2412_IISPSR);
|
|
} else {
|
|
writel(0x0, i2s->regs + S3C2412_IISPSR);
|
|
}
|
|
DBG("%s: PSR=%08x\n", __func__, readl(i2s->regs + S3C2412_IISPSR));
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct clk *s3c2412_get_iisclk(void)
|
|
{
|
|
return s3c2412_i2s.iis_clk;
|
|
}
|
|
EXPORT_SYMBOL_GPL(s3c2412_get_iisclk);
|
|
|
|
|
|
static int s3c2412_i2s_probe(struct platform_device *pdev,
|
|
struct snd_soc_dai *dai)
|
|
{
|
|
DBG("Entered %s\n", __func__);
|
|
|
|
s3c2412_i2s.dev = &pdev->dev;
|
|
|
|
s3c2412_i2s.regs = ioremap(S3C2410_PA_IIS, 0x100);
|
|
if (s3c2412_i2s.regs == NULL)
|
|
return -ENXIO;
|
|
|
|
s3c2412_i2s.iis_pclk = clk_get(&pdev->dev, "iis");
|
|
if (s3c2412_i2s.iis_pclk == NULL) {
|
|
DBG("failed to get iis_clock\n");
|
|
iounmap(s3c2412_i2s.regs);
|
|
return -ENODEV;
|
|
}
|
|
|
|
s3c2412_i2s.iis_cclk = clk_get(&pdev->dev, "i2sclk");
|
|
if (s3c2412_i2s.iis_cclk == NULL) {
|
|
DBG("failed to get i2sclk clock\n");
|
|
iounmap(s3c2412_i2s.regs);
|
|
return -ENODEV;
|
|
}
|
|
|
|
clk_set_parent(s3c2412_i2s.iis_cclk, clk_get(NULL, "mpll"));
|
|
|
|
clk_enable(s3c2412_i2s.iis_pclk);
|
|
clk_enable(s3c2412_i2s.iis_cclk);
|
|
|
|
s3c2412_i2s.iis_clk = s3c2412_i2s.iis_pclk;
|
|
|
|
/* Configure the I2S pins in correct mode */
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE0, S3C2410_GPE0_I2SLRCK);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE1, S3C2410_GPE1_I2SSCLK);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE2, S3C2410_GPE2_CDCLK);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE3, S3C2410_GPE3_I2SSDI);
|
|
s3c2410_gpio_cfgpin(S3C2410_GPE4, S3C2410_GPE4_I2SSDO);
|
|
|
|
s3c2412_snd_txctrl(0);
|
|
s3c2412_snd_rxctrl(0);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int s3c2412_i2s_suspend(struct snd_soc_dai *dai)
|
|
{
|
|
struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
|
|
u32 iismod;
|
|
|
|
if (dai->active) {
|
|
i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD);
|
|
i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON);
|
|
i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR);
|
|
|
|
/* some basic suspend checks */
|
|
|
|
iismod = readl(i2s->regs + S3C2412_IISMOD);
|
|
|
|
if (iismod & S3C2412_IISCON_RXDMA_ACTIVE)
|
|
pr_warning("%s: RXDMA active?\n", __func__);
|
|
|
|
if (iismod & S3C2412_IISCON_TXDMA_ACTIVE)
|
|
pr_warning("%s: TXDMA active?\n", __func__);
|
|
|
|
if (iismod & S3C2412_IISCON_IIS_ACTIVE)
|
|
pr_warning("%s: IIS active\n", __func__);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int s3c2412_i2s_resume(struct snd_soc_dai *dai)
|
|
{
|
|
struct s3c2412_i2s_info *i2s = &s3c2412_i2s;
|
|
|
|
pr_info("dai_active %d, IISMOD %08x, IISCON %08x\n",
|
|
dai->active, i2s->suspend_iismod, i2s->suspend_iiscon);
|
|
|
|
if (dai->active) {
|
|
writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON);
|
|
writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD);
|
|
writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR);
|
|
|
|
writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH,
|
|
i2s->regs + S3C2412_IISFIC);
|
|
|
|
ndelay(250);
|
|
writel(0x0, i2s->regs + S3C2412_IISFIC);
|
|
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define s3c2412_i2s_suspend NULL
|
|
#define s3c2412_i2s_resume NULL
|
|
#endif /* CONFIG_PM */
|
|
|
|
#define S3C2412_I2S_RATES \
|
|
(SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
|
|
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
|
|
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
|
|
|
|
struct snd_soc_dai s3c2412_i2s_dai = {
|
|
.name = "s3c2412-i2s",
|
|
.id = 0,
|
|
.probe = s3c2412_i2s_probe,
|
|
.suspend = s3c2412_i2s_suspend,
|
|
.resume = s3c2412_i2s_resume,
|
|
.playback = {
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = S3C2412_I2S_RATES,
|
|
.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,
|
|
},
|
|
.capture = {
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = S3C2412_I2S_RATES,
|
|
.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE,
|
|
},
|
|
.ops = {
|
|
.trigger = s3c2412_i2s_trigger,
|
|
.hw_params = s3c2412_i2s_hw_params,
|
|
.set_fmt = s3c2412_i2s_set_fmt,
|
|
.set_clkdiv = s3c2412_i2s_set_clkdiv,
|
|
.set_sysclk = s3c2412_i2s_set_sysclk,
|
|
},
|
|
};
|
|
EXPORT_SYMBOL_GPL(s3c2412_i2s_dai);
|
|
|
|
static int __init s3c2412_i2s_init(void)
|
|
{
|
|
return snd_soc_register_dai(&s3c2412_i2s_dai);
|
|
}
|
|
module_init(s3c2412_i2s_init);
|
|
|
|
static void __exit s3c2412_i2s_exit(void)
|
|
{
|
|
snd_soc_unregister_dai(&s3c2412_i2s_dai);
|
|
}
|
|
module_exit(s3c2412_i2s_exit);
|
|
|
|
|
|
/* Module information */
|
|
MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
|
|
MODULE_DESCRIPTION("S3C2412 I2S SoC Interface");
|
|
MODULE_LICENSE("GPL");
|