929badad62
FPGA offset in NOR flash was converted incorrectly when switching from 64M to 4M flash. Signed-off-by: Sean MacLennan <smaclennan@pikatech.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
270 lines
6.2 KiB
Plaintext
270 lines
6.2 KiB
Plaintext
/*
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* Device Tree Source for PIKA Warp
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*
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* Copyright (c) 2008 PIKA Technologies
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* Sean MacLennan <smaclennan@pikatech.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without
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* any warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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model = "pika,warp";
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compatible = "pika,warp";
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dcr-parent = <&{/cpus/cpu@0}>;
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aliases {
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ethernet0 = &EMAC0;
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serial0 = &UART0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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model = "PowerPC,440EP";
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reg = <0x00000000>;
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clock-frequency = <0>; /* Filled in by zImage */
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timebase-frequency = <0>; /* Filled in by zImage */
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i-cache-line-size = <32>;
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d-cache-line-size = <32>;
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i-cache-size = <32768>;
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d-cache-size = <32768>;
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dcr-controller;
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dcr-access-method = "native";
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
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};
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UIC0: interrupt-controller0 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0x0c0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "ibm,uic-440ep","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0x0d0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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SDR0: sdr {
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compatible = "ibm,sdr-440ep";
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dcr-reg = <0x00e 0x002>;
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};
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CPR0: cpr {
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compatible = "ibm,cpr-440ep";
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dcr-reg = <0x00c 0x002>;
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};
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plb {
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compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by zImage */
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SDRAM0: sdram {
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compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
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dcr-reg = <0x010 0x002>;
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};
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DMA0: dma {
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compatible = "ibm,dma-440ep", "ibm,dma-440gp";
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dcr-reg = <0x100 0x027>;
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
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dcr-reg = <0x180 0x062>;
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num-tx-chans = <4>;
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num-rx-chans = <2>;
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interrupt-parent = <&MAL0>;
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interrupts = <0x0 0x1 0x2 0x3 0x4>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
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/*RXEOB*/ 0x1 &UIC0 0xb 0x4
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/*SERR*/ 0x2 &UIC1 0x0 0x4
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/*TXDE*/ 0x3 &UIC1 0x1 0x4
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/*RXDE*/ 0x4 &UIC1 0x2 0x4>;
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};
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POB0: opb {
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compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x00000000 0x00000000 0x00000000 0x80000000
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0x80000000 0x00000000 0x80000000 0x80000000>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x7 0x4>;
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clock-frequency = <0>; /* Filled in by zImage */
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EBC0: ebc {
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compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
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dcr-reg = <0x012 0x002>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <0>; /* Filled in by zImage */
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interrupts = <0x5 0x1>;
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interrupt-parent = <&UIC1>;
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fpga@2,0 {
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compatible = "pika,fpga";
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reg = <0x00000002 0x00000000 0x00001000>;
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interrupts = <0x18 0x8>;
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interrupt-parent = <&UIC0>;
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};
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fpga@2,2000 {
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compatible = "pika,fpga-sgl";
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reg = <0x00000002 0x00002000 0x00000200>;
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};
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fpga@2,4000 {
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compatible = "pika,fpga-sd";
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reg = <0x00000002 0x00004000 0x00000A00>;
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};
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nor_flash@0,0 {
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compatible = "amd,s29gl032a", "cfi-flash";
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bank-width = <2>;
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reg = <0x00000000 0x00000000 0x00400000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@300000 {
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label = "fpga";
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reg = <0x0300000 0x00040000>;
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};
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partition@340000 {
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label = "env";
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reg = <0x0340000 0x00040000>;
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};
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partition@380000 {
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label = "u-boot";
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reg = <0x0380000 0x00080000>;
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};
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};
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600300 0x00000008>;
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virtual-reg = <0xef600300>;
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clock-frequency = <0>; /* Filled in by zImage */
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current-speed = <115200>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x0 0x4>;
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};
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IIC0: i2c@ef600700 {
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compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
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reg = <0xef600700 0x00000014>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x2 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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ad7414@4a {
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compatible = "adi,ad7414";
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reg = <0x4a>;
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interrupts = <0x19 0x8>;
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interrupt-parent = <&UIC0>;
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};
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/* This will create 52 and 53 */
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at24@52 {
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compatible = "at,24c04";
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reg = <0x52>;
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};
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};
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GPIO0: gpio@ef600b00 {
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compatible = "ibm,gpio-440ep";
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reg = <0xef600b00 0x00000048>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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GPIO1: gpio@ef600c00 {
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compatible = "ibm,gpio-440ep";
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reg = <0xef600c00 0x00000048>;
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#gpio-cells = <2>;
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gpio-controller;
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led@31 {
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compatible = "linux,gpio-led";
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linux,name = ":green:";
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gpios = <&GPIO1 31 0>;
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};
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led@30 {
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compatible = "linux,gpio-led";
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linux,name = ":red:";
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gpios = <&GPIO1 30 0>;
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};
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};
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ZMII0: emac-zmii@ef600d00 {
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compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
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reg = <0xef600d00 0x0000000c>;
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};
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EMAC0: ethernet@ef600e00 {
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device_type = "network";
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compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
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interrupt-parent = <&UIC1>;
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interrupts = <0x1c 0x4 0x1d 0x4>;
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reg = <0xef600e00 0x00000070>;
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local-mac-address = [000000000000];
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mal-device = <&MAL0>;
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mal-tx-channel = <0 1>;
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mal-rx-channel = <0>;
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cell-index = <0>;
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max-frame-size = <1500>;
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rx-fifo-size = <4096>;
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tx-fifo-size = <2048>;
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phy-mode = "rmii";
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phy-map = <0x00000000>;
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zmii-device = <&ZMII0>;
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zmii-channel = <0>;
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};
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usb@ef601000 {
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compatible = "ohci-be";
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reg = <0xef601000 0x00000080>;
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interrupts = <0x8 0x1 0x9 0x1>;
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interrupt-parent = < &UIC1 >;
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};
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};
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};
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chosen {
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linux,stdout-path = "/plb/opb/serial@ef600300";
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};
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};
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