0ffa798d94
Merge reason: Both 'perf bench' and the pending PowerPC changes are now ready for the next merge window. Signed-off-by: Ingo Molnar <mingo@elte.hu>
445 lines
11 KiB
C
445 lines
11 KiB
C
/*
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* NOTE: this file will be removed in a future kernel release, it is
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* provided as a courtesy copy of user-space code that relies on the
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* old (pre-rename) symbols and constants.
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*
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* Performance events:
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*
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* Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
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* Copyright (C) 2008-2009, Red Hat, Inc., Ingo Molnar
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* Copyright (C) 2008-2009, Red Hat, Inc., Peter Zijlstra
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*
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* Data type definitions, declarations, prototypes.
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*
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* Started by: Thomas Gleixner and Ingo Molnar
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*
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* For licencing details see kernel-base/COPYING
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*/
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#ifndef _LINUX_PERF_COUNTER_H
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#define _LINUX_PERF_COUNTER_H
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#include <linux/types.h>
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#include <linux/ioctl.h>
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#include <asm/byteorder.h>
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/*
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* User-space ABI bits:
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*/
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/*
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* attr.type
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*/
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enum perf_type_id {
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PERF_TYPE_HARDWARE = 0,
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PERF_TYPE_SOFTWARE = 1,
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PERF_TYPE_TRACEPOINT = 2,
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PERF_TYPE_HW_CACHE = 3,
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PERF_TYPE_RAW = 4,
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PERF_TYPE_MAX, /* non-ABI */
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};
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/*
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* Generalized performance counter event types, used by the
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* attr.event_id parameter of the sys_perf_counter_open()
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* syscall:
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*/
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enum perf_hw_id {
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/*
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* Common hardware events, generalized by the kernel:
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*/
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PERF_COUNT_HW_CPU_CYCLES = 0,
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PERF_COUNT_HW_INSTRUCTIONS = 1,
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PERF_COUNT_HW_CACHE_REFERENCES = 2,
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PERF_COUNT_HW_CACHE_MISSES = 3,
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PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
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PERF_COUNT_HW_BRANCH_MISSES = 5,
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PERF_COUNT_HW_BUS_CYCLES = 6,
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PERF_COUNT_HW_MAX, /* non-ABI */
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};
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/*
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* Generalized hardware cache counters:
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*
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* { L1-D, L1-I, LLC, ITLB, DTLB, BPU } x
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* { read, write, prefetch } x
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* { accesses, misses }
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*/
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enum perf_hw_cache_id {
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PERF_COUNT_HW_CACHE_L1D = 0,
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PERF_COUNT_HW_CACHE_L1I = 1,
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PERF_COUNT_HW_CACHE_LL = 2,
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PERF_COUNT_HW_CACHE_DTLB = 3,
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PERF_COUNT_HW_CACHE_ITLB = 4,
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PERF_COUNT_HW_CACHE_BPU = 5,
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PERF_COUNT_HW_CACHE_MAX, /* non-ABI */
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};
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enum perf_hw_cache_op_id {
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PERF_COUNT_HW_CACHE_OP_READ = 0,
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PERF_COUNT_HW_CACHE_OP_WRITE = 1,
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PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
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PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */
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};
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enum perf_hw_cache_op_result_id {
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PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
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PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
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PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */
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};
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/*
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* Special "software" counters provided by the kernel, even if the hardware
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* does not support performance counters. These counters measure various
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* physical and sw events of the kernel (and allow the profiling of them as
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* well):
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*/
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enum perf_sw_ids {
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PERF_COUNT_SW_CPU_CLOCK = 0,
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PERF_COUNT_SW_TASK_CLOCK = 1,
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PERF_COUNT_SW_PAGE_FAULTS = 2,
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PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
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PERF_COUNT_SW_CPU_MIGRATIONS = 4,
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PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
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PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
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PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
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PERF_COUNT_SW_EMULATION_FAULTS = 8,
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PERF_COUNT_SW_MAX, /* non-ABI */
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};
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/*
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* Bits that can be set in attr.sample_type to request information
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* in the overflow packets.
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*/
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enum perf_counter_sample_format {
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PERF_SAMPLE_IP = 1U << 0,
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PERF_SAMPLE_TID = 1U << 1,
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PERF_SAMPLE_TIME = 1U << 2,
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PERF_SAMPLE_ADDR = 1U << 3,
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PERF_SAMPLE_READ = 1U << 4,
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PERF_SAMPLE_CALLCHAIN = 1U << 5,
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PERF_SAMPLE_ID = 1U << 6,
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PERF_SAMPLE_CPU = 1U << 7,
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PERF_SAMPLE_PERIOD = 1U << 8,
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PERF_SAMPLE_STREAM_ID = 1U << 9,
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PERF_SAMPLE_RAW = 1U << 10,
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PERF_SAMPLE_MAX = 1U << 11, /* non-ABI */
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};
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/*
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* The format of the data returned by read() on a perf counter fd,
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* as specified by attr.read_format:
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*
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* struct read_format {
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* { u64 value;
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* { u64 time_enabled; } && PERF_FORMAT_ENABLED
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* { u64 time_running; } && PERF_FORMAT_RUNNING
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* { u64 id; } && PERF_FORMAT_ID
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* } && !PERF_FORMAT_GROUP
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*
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* { u64 nr;
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* { u64 time_enabled; } && PERF_FORMAT_ENABLED
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* { u64 time_running; } && PERF_FORMAT_RUNNING
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* { u64 value;
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* { u64 id; } && PERF_FORMAT_ID
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* } cntr[nr];
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* } && PERF_FORMAT_GROUP
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* };
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*/
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enum perf_counter_read_format {
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PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
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PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
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PERF_FORMAT_ID = 1U << 2,
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PERF_FORMAT_GROUP = 1U << 3,
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PERF_FORMAT_MAX = 1U << 4, /* non-ABI */
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};
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#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */
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/*
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* Hardware event to monitor via a performance monitoring counter:
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*/
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struct perf_counter_attr {
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/*
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* Major type: hardware/software/tracepoint/etc.
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*/
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__u32 type;
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/*
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* Size of the attr structure, for fwd/bwd compat.
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*/
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__u32 size;
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/*
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* Type specific configuration information.
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*/
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__u64 config;
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union {
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__u64 sample_period;
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__u64 sample_freq;
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};
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__u64 sample_type;
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__u64 read_format;
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__u64 disabled : 1, /* off by default */
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inherit : 1, /* children inherit it */
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pinned : 1, /* must always be on PMU */
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exclusive : 1, /* only group on PMU */
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exclude_user : 1, /* don't count user */
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exclude_kernel : 1, /* ditto kernel */
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exclude_hv : 1, /* ditto hypervisor */
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exclude_idle : 1, /* don't count when idle */
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mmap : 1, /* include mmap data */
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comm : 1, /* include comm data */
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freq : 1, /* use freq, not period */
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inherit_stat : 1, /* per task counts */
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enable_on_exec : 1, /* next exec enables */
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task : 1, /* trace fork/exit */
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watermark : 1, /* wakeup_watermark */
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__reserved_1 : 49;
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union {
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__u32 wakeup_events; /* wakeup every n events */
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__u32 wakeup_watermark; /* bytes before wakeup */
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};
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__u32 __reserved_2;
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__u64 __reserved_3;
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};
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/*
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* Ioctls that can be done on a perf counter fd:
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*/
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#define PERF_COUNTER_IOC_ENABLE _IO ('$', 0)
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#define PERF_COUNTER_IOC_DISABLE _IO ('$', 1)
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#define PERF_COUNTER_IOC_REFRESH _IO ('$', 2)
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#define PERF_COUNTER_IOC_RESET _IO ('$', 3)
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#define PERF_COUNTER_IOC_PERIOD _IOW('$', 4, u64)
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#define PERF_COUNTER_IOC_SET_OUTPUT _IO ('$', 5)
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#define PERF_COUNTER_IOC_SET_FILTER _IOW('$', 6, char *)
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enum perf_counter_ioc_flags {
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PERF_IOC_FLAG_GROUP = 1U << 0,
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};
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/*
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* Structure of the page that can be mapped via mmap
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*/
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struct perf_counter_mmap_page {
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__u32 version; /* version number of this structure */
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__u32 compat_version; /* lowest version this is compat with */
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/*
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* Bits needed to read the hw counters in user-space.
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*
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* u32 seq;
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* s64 count;
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*
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* do {
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* seq = pc->lock;
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*
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* barrier()
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* if (pc->index) {
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* count = pmc_read(pc->index - 1);
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* count += pc->offset;
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* } else
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* goto regular_read;
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*
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* barrier();
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* } while (pc->lock != seq);
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*
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* NOTE: for obvious reason this only works on self-monitoring
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* processes.
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*/
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__u32 lock; /* seqlock for synchronization */
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__u32 index; /* hardware counter identifier */
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__s64 offset; /* add to hardware counter value */
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__u64 time_enabled; /* time counter active */
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__u64 time_running; /* time counter on cpu */
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/*
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* Hole for extension of the self monitor capabilities
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*/
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__u64 __reserved[123]; /* align to 1k */
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/*
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* Control data for the mmap() data buffer.
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*
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* User-space reading the @data_head value should issue an rmb(), on
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* SMP capable platforms, after reading this value -- see
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* perf_counter_wakeup().
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*
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* When the mapping is PROT_WRITE the @data_tail value should be
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* written by userspace to reflect the last read data. In this case
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* the kernel will not over-write unread data.
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*/
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__u64 data_head; /* head in the data section */
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__u64 data_tail; /* user-space written tail */
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};
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#define PERF_EVENT_MISC_CPUMODE_MASK (3 << 0)
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#define PERF_EVENT_MISC_CPUMODE_UNKNOWN (0 << 0)
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#define PERF_EVENT_MISC_KERNEL (1 << 0)
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#define PERF_EVENT_MISC_USER (2 << 0)
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#define PERF_EVENT_MISC_HYPERVISOR (3 << 0)
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struct perf_event_header {
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__u32 type;
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__u16 misc;
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__u16 size;
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};
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enum perf_event_type {
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/*
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* The MMAP events record the PROT_EXEC mappings so that we can
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* correlate userspace IPs to code. They have the following structure:
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*
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* struct {
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* struct perf_event_header header;
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*
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* u32 pid, tid;
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* u64 addr;
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* u64 len;
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* u64 pgoff;
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* char filename[];
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* };
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*/
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PERF_EVENT_MMAP = 1,
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/*
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* struct {
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* struct perf_event_header header;
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* u64 id;
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* u64 lost;
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* };
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*/
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PERF_EVENT_LOST = 2,
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/*
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* struct {
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* struct perf_event_header header;
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*
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* u32 pid, tid;
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* char comm[];
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* };
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*/
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PERF_EVENT_COMM = 3,
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/*
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* struct {
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* struct perf_event_header header;
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* u32 pid, ppid;
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* u32 tid, ptid;
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* u64 time;
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* };
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*/
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PERF_EVENT_EXIT = 4,
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/*
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* struct {
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* struct perf_event_header header;
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* u64 time;
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* u64 id;
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* u64 stream_id;
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* };
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*/
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PERF_EVENT_THROTTLE = 5,
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PERF_EVENT_UNTHROTTLE = 6,
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/*
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* struct {
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* struct perf_event_header header;
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* u32 pid, ppid;
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* u32 tid, ptid;
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* u64 time;
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* };
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*/
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PERF_EVENT_FORK = 7,
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/*
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* struct {
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* struct perf_event_header header;
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* u32 pid, tid;
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*
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* struct read_format values;
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* };
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*/
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PERF_EVENT_READ = 8,
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/*
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* struct {
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* struct perf_event_header header;
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*
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* { u64 ip; } && PERF_SAMPLE_IP
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* { u32 pid, tid; } && PERF_SAMPLE_TID
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* { u64 time; } && PERF_SAMPLE_TIME
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* { u64 addr; } && PERF_SAMPLE_ADDR
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* { u64 id; } && PERF_SAMPLE_ID
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* { u64 stream_id;} && PERF_SAMPLE_STREAM_ID
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* { u32 cpu, res; } && PERF_SAMPLE_CPU
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* { u64 period; } && PERF_SAMPLE_PERIOD
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*
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* { struct read_format values; } && PERF_SAMPLE_READ
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*
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* { u64 nr,
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* u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN
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*
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* #
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* # The RAW record below is opaque data wrt the ABI
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* #
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* # That is, the ABI doesn't make any promises wrt to
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* # the stability of its content, it may vary depending
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* # on event, hardware, kernel version and phase of
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* # the moon.
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* #
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* # In other words, PERF_SAMPLE_RAW contents are not an ABI.
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* #
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*
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* { u32 size;
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* char data[size];}&& PERF_SAMPLE_RAW
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* };
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*/
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PERF_EVENT_SAMPLE = 9,
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PERF_EVENT_MAX, /* non-ABI */
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};
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enum perf_callchain_context {
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PERF_CONTEXT_HV = (__u64)-32,
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PERF_CONTEXT_KERNEL = (__u64)-128,
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PERF_CONTEXT_USER = (__u64)-512,
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PERF_CONTEXT_GUEST = (__u64)-2048,
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PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,
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PERF_CONTEXT_GUEST_USER = (__u64)-2560,
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PERF_CONTEXT_MAX = (__u64)-4095,
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};
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#define PERF_FLAG_FD_NO_GROUP (1U << 0)
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#define PERF_FLAG_FD_OUTPUT (1U << 1)
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/*
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* In case some app still references the old symbols:
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*/
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#define __NR_perf_counter_open __NR_perf_event_open
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#define PR_TASK_PERF_COUNTERS_DISABLE PR_TASK_PERF_EVENTS_DISABLE
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#define PR_TASK_PERF_COUNTERS_ENABLE PR_TASK_PERF_EVENTS_ENABLE
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#endif /* _LINUX_PERF_COUNTER_H */
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