4e1e71885e
Update to AFE native driver to send VAD calibration to DSP. Add support for per service API version query in q6core driver. Change-Id: I6234879054e7b5622a40912da16072fd8dbd83fe Signed-off-by: Mangesh Kunchamwar <mangeshk@codeaurora.org>
420 lines
13 KiB
C
420 lines
13 KiB
C
/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __Q6AFE_V2_H__
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#define __Q6AFE_V2_H__
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#include <dsp/apr_audio-v2.h>
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#include <dsp/rtac.h>
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#define IN 0x000
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#define OUT 0x001
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#define MSM_AFE_MONO 0
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#define MSM_AFE_CH_STEREO 1
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#define MSM_AFE_MONO_RIGHT 1
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#define MSM_AFE_MONO_LEFT 2
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#define MSM_AFE_STEREO 3
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#define MSM_AFE_4CHANNELS 4
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#define MSM_AFE_6CHANNELS 6
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#define MSM_AFE_8CHANNELS 8
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#define MSM_AFE_I2S_FORMAT_LPCM 0
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#define MSM_AFE_I2S_FORMAT_COMPR 1
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#define MSM_AFE_I2S_FORMAT_IEC60958_LPCM 2
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#define MSM_AFE_I2S_FORMAT_IEC60958_COMPR 3
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#define MSM_AFE_PORT_TYPE_RX 0
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#define MSM_AFE_PORT_TYPE_TX 1
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#define RT_PROXY_DAI_001_RX 0xE0
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#define RT_PROXY_DAI_001_TX 0xF0
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#define RT_PROXY_DAI_002_RX 0xF1
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#define RT_PROXY_DAI_002_TX 0xE1
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#define VIRTUAL_ID_TO_PORTID(val) ((val & 0xF) | 0x2000)
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#define AFE_CLK_VERSION_V1 1
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#define AFE_CLK_VERSION_V2 2
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#define AFE_API_VERSION_SUPPORT_SPV3 2
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#define AFE_API_VERSION_V3 3
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/* for VAD and Island mode */
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#define AFE_API_VERSION_V4 4
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typedef int (*routing_cb)(int port);
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enum {
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/* IDX 0->4 */
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IDX_PRIMARY_I2S_RX,
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IDX_PRIMARY_I2S_TX,
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IDX_AFE_PORT_ID_PRIMARY_PCM_RX,
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IDX_AFE_PORT_ID_PRIMARY_PCM_TX,
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IDX_SECONDARY_I2S_RX,
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/* IDX 5->9 */
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IDX_SECONDARY_I2S_TX,
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IDX_MI2S_RX,
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IDX_MI2S_TX,
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IDX_HDMI_RX,
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IDX_RSVD_2,
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/* IDX 10->14 */
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IDX_RSVD_3,
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IDX_DIGI_MIC_TX,
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IDX_VOICE_RECORD_RX,
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IDX_VOICE_RECORD_TX,
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IDX_VOICE_PLAYBACK_TX,
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/* IDX 15->19 */
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IDX_SLIMBUS_0_RX,
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IDX_SLIMBUS_0_TX,
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IDX_SLIMBUS_1_RX,
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IDX_SLIMBUS_1_TX,
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IDX_SLIMBUS_2_RX,
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/* IDX 20->24 */
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IDX_SLIMBUS_2_TX,
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IDX_SLIMBUS_3_RX,
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IDX_SLIMBUS_3_TX,
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IDX_SLIMBUS_4_RX,
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IDX_SLIMBUS_4_TX,
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/* IDX 25->29 */
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IDX_SLIMBUS_5_RX,
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IDX_SLIMBUS_5_TX,
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IDX_INT_BT_SCO_RX,
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IDX_INT_BT_SCO_TX,
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IDX_INT_BT_A2DP_RX,
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/* IDX 30->34 */
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IDX_INT_FM_RX,
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IDX_INT_FM_TX,
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IDX_RT_PROXY_PORT_001_RX,
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IDX_RT_PROXY_PORT_001_TX,
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IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX,
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/* IDX 35->39 */
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IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX,
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IDX_AFE_PORT_ID_SECONDARY_MI2S_RX,
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IDX_AFE_PORT_ID_SECONDARY_MI2S_TX,
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IDX_AFE_PORT_ID_TERTIARY_MI2S_RX,
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IDX_AFE_PORT_ID_TERTIARY_MI2S_TX,
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/* IDX 40->44 */
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IDX_AFE_PORT_ID_PRIMARY_MI2S_RX,
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IDX_AFE_PORT_ID_PRIMARY_MI2S_TX,
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IDX_AFE_PORT_ID_SECONDARY_PCM_RX,
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IDX_AFE_PORT_ID_SECONDARY_PCM_TX,
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IDX_VOICE2_PLAYBACK_TX,
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/* IDX 45->49 */
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IDX_SLIMBUS_6_RX,
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IDX_SLIMBUS_6_TX,
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IDX_SPDIF_RX,
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IDX_GLOBAL_CFG,
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IDX_AUDIO_PORT_ID_I2S_RX,
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/* IDX 50->53 */
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IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_SD1,
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IDX_AFE_PORT_ID_QUINARY_MI2S_RX,
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IDX_AFE_PORT_ID_QUINARY_MI2S_TX,
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IDX_AFE_PORT_ID_SENARY_MI2S_TX,
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/* IDX 54->117 */
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_0,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_0,
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_1,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_1,
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_2,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_2,
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_3,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_3,
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_4,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_4,
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_5,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_5,
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_6,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_6,
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IDX_AFE_PORT_ID_PRIMARY_TDM_RX_7,
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IDX_AFE_PORT_ID_PRIMARY_TDM_TX_7,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_0,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_0,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_1,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_1,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_2,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_2,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_3,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_3,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_4,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_4,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_5,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_5,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_6,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_6,
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IDX_AFE_PORT_ID_SECONDARY_TDM_RX_7,
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IDX_AFE_PORT_ID_SECONDARY_TDM_TX_7,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_0,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_0,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_1,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_1,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_2,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_2,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_3,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_3,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_4,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_4,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_5,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_5,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_6,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_6,
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IDX_AFE_PORT_ID_TERTIARY_TDM_RX_7,
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IDX_AFE_PORT_ID_TERTIARY_TDM_TX_7,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_0,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_0,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_1,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_1,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_2,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_2,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_3,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_3,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_4,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_4,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_5,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_5,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_6,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_6,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_RX_7,
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IDX_AFE_PORT_ID_QUATERNARY_TDM_TX_7,
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/* IDX 118->121 */
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IDX_SLIMBUS_7_RX,
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IDX_SLIMBUS_7_TX,
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IDX_SLIMBUS_8_RX,
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IDX_SLIMBUS_8_TX,
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/* IDX 122-> 123 */
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IDX_AFE_PORT_ID_USB_RX,
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IDX_AFE_PORT_ID_USB_TX,
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/* IDX 124 */
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IDX_DISPLAY_PORT_RX,
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/* IDX 125-> 128 */
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IDX_AFE_PORT_ID_TERTIARY_PCM_RX,
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IDX_AFE_PORT_ID_TERTIARY_PCM_TX,
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IDX_AFE_PORT_ID_QUATERNARY_PCM_RX,
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IDX_AFE_PORT_ID_QUATERNARY_PCM_TX,
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/* IDX 129-> 142 */
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IDX_AFE_PORT_ID_INT0_MI2S_RX,
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IDX_AFE_PORT_ID_INT0_MI2S_TX,
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IDX_AFE_PORT_ID_INT1_MI2S_RX,
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IDX_AFE_PORT_ID_INT1_MI2S_TX,
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IDX_AFE_PORT_ID_INT2_MI2S_RX,
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IDX_AFE_PORT_ID_INT2_MI2S_TX,
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IDX_AFE_PORT_ID_INT3_MI2S_RX,
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IDX_AFE_PORT_ID_INT3_MI2S_TX,
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IDX_AFE_PORT_ID_INT4_MI2S_RX,
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IDX_AFE_PORT_ID_INT4_MI2S_TX,
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IDX_AFE_PORT_ID_INT5_MI2S_RX,
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IDX_AFE_PORT_ID_INT5_MI2S_TX,
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IDX_AFE_PORT_ID_INT6_MI2S_RX,
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IDX_AFE_PORT_ID_INT6_MI2S_TX,
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/* IDX 143-> 160 */
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IDX_AFE_PORT_ID_QUINARY_PCM_RX,
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IDX_AFE_PORT_ID_QUINARY_PCM_TX,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_0,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_0,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_1,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_1,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_2,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_2,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_3,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_3,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_4,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_4,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_5,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_5,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_6,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_6,
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IDX_AFE_PORT_ID_QUINARY_TDM_RX_7,
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IDX_AFE_PORT_ID_QUINARY_TDM_TX_7,
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/* IDX 161 to 166 */
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IDX_AFE_PORT_ID_WSA_CODEC_DMA_RX_0,
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IDX_AFE_PORT_ID_WSA_CODEC_DMA_TX_0,
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IDX_AFE_PORT_ID_WSA_CODEC_DMA_RX_1,
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IDX_AFE_PORT_ID_WSA_CODEC_DMA_TX_1,
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IDX_AFE_PORT_ID_WSA_CODEC_DMA_TX_2,
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IDX_AFE_PORT_ID_VA_CODEC_DMA_TX_0,
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IDX_AFE_PORT_ID_VA_CODEC_DMA_TX_1,
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AFE_MAX_PORTS
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};
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enum afe_mad_type {
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MAD_HW_NONE = 0x00,
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MAD_HW_AUDIO = 0x01,
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MAD_HW_BEACON = 0x02,
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MAD_HW_ULTRASOUND = 0x04,
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MAD_SW_AUDIO = 0x05,
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};
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enum afe_cal_mode {
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AFE_CAL_MODE_DEFAULT = 0x00,
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AFE_CAL_MODE_NONE,
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};
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enum afe_vad_cfg_type {
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AFE_VAD_ENABLE = 0x00,
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AFE_VAD_PREROLL,
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};
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struct vad_config {
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u32 is_enable;
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u32 pre_roll;
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};
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struct afe_audio_buffer {
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dma_addr_t phys;
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void *data;
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uint32_t used;
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uint32_t size;/* size of buffer */
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uint32_t actual_size; /* actual number of bytes read by DSP */
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struct dma_buf *dma_buf;
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};
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struct afe_audio_port_data {
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struct afe_audio_buffer *buf;
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uint32_t max_buf_cnt;
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uint32_t dsp_buf;
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uint32_t cpu_buf;
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struct list_head mem_map_handle;
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uint32_t tmp_hdl;
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/* read or write locks */
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struct mutex lock;
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spinlock_t dsp_lock;
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};
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struct afe_audio_client {
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atomic_t cmd_state;
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/* Relative or absolute TS */
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uint32_t time_flag;
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void *priv;
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uint64_t time_stamp;
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struct mutex cmd_lock;
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/* idx:1 out port, 0: in port*/
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struct afe_audio_port_data port[2];
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wait_queue_head_t cmd_wait;
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uint32_t mem_map_handle;
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};
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struct aanc_data {
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bool aanc_active;
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uint16_t aanc_rx_port;
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uint16_t aanc_tx_port;
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uint32_t aanc_rx_port_sample_rate;
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uint32_t aanc_tx_port_sample_rate;
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};
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int afe_open(u16 port_id, union afe_port_config *afe_config, int rate);
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int afe_close(int port_id);
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int afe_loopback(u16 enable, u16 rx_port, u16 tx_port);
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int afe_sidetone_enable(u16 tx_port_id, u16 rx_port_id, bool enable);
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int afe_set_display_stream(u16 rx_port_id, u32 stream_idx, u32 ctl_idx);
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int afe_loopback_gain(u16 port_id, u16 volume);
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int afe_validate_port(u16 port_id);
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int afe_get_port_index(u16 port_id);
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int afe_get_topology(int port_id);
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int afe_start_pseudo_port(u16 port_id);
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int afe_stop_pseudo_port(u16 port_id);
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uint32_t afe_req_mmap_handle(struct afe_audio_client *ac);
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int afe_memory_map(phys_addr_t dma_addr_p, u32 dma_buf_sz,
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struct afe_audio_client *ac);
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int afe_cmd_memory_map(phys_addr_t dma_addr_p, u32 dma_buf_sz);
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int afe_cmd_memory_map_nowait(int port_id, phys_addr_t dma_addr_p,
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u32 dma_buf_sz);
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int afe_cmd_memory_unmap(u32 dma_addr_p);
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int afe_cmd_memory_unmap_nowait(u32 dma_addr_p);
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void afe_set_dtmf_gen_rx_portid(u16 rx_port_id, int set);
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int afe_dtmf_generate_rx(int64_t duration_in_ms,
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uint16_t high_freq,
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uint16_t low_freq, uint16_t gain);
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int afe_register_get_events(u16 port_id,
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void (*cb)(uint32_t opcode,
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uint32_t token, uint32_t *payload, void *priv),
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void *private_data);
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int afe_unregister_get_events(u16 port_id);
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int afe_rt_proxy_port_write(phys_addr_t buf_addr_p,
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u32 mem_map_handle, int bytes);
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int afe_rt_proxy_port_read(phys_addr_t buf_addr_p,
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u32 mem_map_handle, int bytes);
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void afe_set_cal_mode(u16 port_id, enum afe_cal_mode afe_cal_mode);
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void afe_set_vad_cfg(u32 vad_enable, u32 preroll_config,
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u32 port_id);
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void afe_set_island_mode_cfg(u16 port_id, u32 enable_flag);
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int afe_port_start(u16 port_id, union afe_port_config *afe_config,
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u32 rate);
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int afe_port_start_v2(u16 port_id, union afe_port_config *afe_config,
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u32 rate, u16 afe_in_channels, u16 afe_in_bit_width,
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struct afe_enc_config *enc_config,
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struct afe_dec_config *dec_config);
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int afe_spk_prot_feed_back_cfg(int src_port, int dst_port,
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int l_ch, int r_ch, u32 enable);
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int afe_spk_prot_get_calib_data(struct afe_spkr_prot_get_vi_calib *calib);
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int afe_port_stop_nowait(int port_id);
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int afe_apply_gain(u16 port_id, u16 gain);
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int afe_q6_interface_prepare(void);
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int afe_get_port_type(u16 port_id);
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int q6afe_audio_client_buf_alloc_contiguous(unsigned int dir,
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struct afe_audio_client *ac,
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unsigned int bufsz,
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unsigned int bufcnt);
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struct afe_audio_client *q6afe_audio_client_alloc(void *priv);
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int q6afe_audio_client_buf_free_contiguous(unsigned int dir,
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struct afe_audio_client *ac);
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void q6afe_audio_client_free(struct afe_audio_client *ac);
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/* if port_id is virtual, convert to physical..
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* if port_id is already physical, return physical
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*/
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int afe_convert_virtual_to_portid(u16 port_id);
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int afe_pseudo_port_start_nowait(u16 port_id);
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int afe_pseudo_port_stop_nowait(u16 port_id);
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int afe_set_lpass_clock(u16 port_id, struct afe_clk_cfg *cfg);
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int afe_set_lpass_clock_v2(u16 port_id, struct afe_clk_set *cfg);
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int afe_set_lpass_clk_cfg(int index, struct afe_clk_set *cfg);
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int afe_set_digital_codec_core_clock(u16 port_id,
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struct afe_digital_clk_cfg *cfg);
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int afe_set_lpass_internal_digital_codec_clock(u16 port_id,
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struct afe_digital_clk_cfg *cfg);
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int afe_enable_lpass_core_shared_clock(u16 port_id, u32 enable);
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int q6afe_check_osr_clk_freq(u32 freq);
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int afe_send_spdif_clk_cfg(struct afe_param_id_spdif_clk_cfg *cfg,
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u16 port_id);
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int afe_send_spdif_ch_status_cfg(struct afe_param_id_spdif_ch_status_cfg
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*ch_status_cfg, u16 port_id);
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int afe_spdif_port_start(u16 port_id, struct afe_spdif_port_config *spdif_port,
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u32 rate);
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int afe_turn_onoff_hw_mad(u16 mad_type, u16 mad_enable);
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int afe_port_set_mad_type(u16 port_id, enum afe_mad_type mad_type);
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enum afe_mad_type afe_port_get_mad_type(u16 port_id);
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int afe_set_config(enum afe_config_type config_type, void *config_data,
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int arg);
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void afe_clear_config(enum afe_config_type config);
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bool afe_has_config(enum afe_config_type config);
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void afe_set_aanc_info(struct aanc_data *aanc_info);
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int afe_port_group_set_param(u16 group_id,
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union afe_port_group_config *afe_group_config);
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int afe_port_group_enable(u16 group_id,
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union afe_port_group_config *afe_group_config, u16 enable);
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int afe_unmap_rtac_block(uint32_t *mem_map_handle);
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int afe_map_rtac_block(struct rtac_cal_block_data *cal_block);
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int afe_send_slot_mapping_cfg(
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struct afe_param_id_slot_mapping_cfg *slot_mapping_cfg,
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u16 port_id);
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int afe_send_custom_tdm_header_cfg(
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struct afe_param_id_custom_tdm_header_cfg *custom_tdm_header_cfg,
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u16 port_id);
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int afe_tdm_port_start(u16 port_id, struct afe_tdm_port_config *tdm_port,
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u32 rate, u16 num_groups);
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void afe_set_routing_callback(routing_cb cb);
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int afe_get_av_dev_drift(struct afe_param_id_dev_timing_stats *timing_stats,
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u16 port);
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int afe_cal_init_hwdep(void *card);
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int afe_send_port_island_mode(u16 port_id);
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#endif /* __Q6AFE_V2_H__ */
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