8426e1f6af
Introduce an atomic_inc_not_zero operation. Make this a special case of atomic_add_unless because lockless pagecache actually wants atomic_inc_not_negativeone due to its offset refcount. Signed-off-by: Nick Piggin <npiggin@suse.de> Cc: "Paul E. McKenney" <paulmck@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
141 lines
3.2 KiB
C
141 lines
3.2 KiB
C
#ifndef __ARCH_H8300_ATOMIC__
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#define __ARCH_H8300_ATOMIC__
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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typedef struct { int counter; } atomic_t;
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) ((v)->counter)
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#define atomic_set(v, i) (((v)->counter) = i)
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#include <asm/system.h>
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#include <linux/kernel.h>
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static __inline__ int atomic_add_return(int i, atomic_t *v)
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{
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int ret,flags;
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local_irq_save(flags);
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ret = v->counter += i;
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local_irq_restore(flags);
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return ret;
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}
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#define atomic_add(i, v) atomic_add_return(i, v)
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#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
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static __inline__ int atomic_sub_return(int i, atomic_t *v)
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{
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int ret,flags;
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local_irq_save(flags);
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ret = v->counter -= i;
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local_irq_restore(flags);
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return ret;
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}
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#define atomic_sub(i, v) atomic_sub_return(i, v)
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static __inline__ int atomic_inc_return(atomic_t *v)
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{
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int ret,flags;
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local_irq_save(flags);
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v->counter++;
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ret = v->counter;
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local_irq_restore(flags);
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return ret;
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}
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#define atomic_inc(v) atomic_inc_return(v)
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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static __inline__ int atomic_dec_return(atomic_t *v)
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{
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int ret,flags;
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local_irq_save(flags);
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--v->counter;
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ret = v->counter;
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local_irq_restore(flags);
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return ret;
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}
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#define atomic_dec(v) atomic_dec_return(v)
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static __inline__ int atomic_dec_and_test(atomic_t *v)
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{
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int ret,flags;
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local_irq_save(flags);
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--v->counter;
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ret = v->counter;
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local_irq_restore(flags);
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return ret == 0;
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}
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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int ret;
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unsigned long flags;
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local_irq_save(flags);
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ret = v->counter;
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if (likely(ret == old))
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v->counter = new;
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local_irq_restore(flags);
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return ret;
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}
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static inline int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int ret;
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unsigned long flags;
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local_irq_save(flags);
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ret = v->counter;
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if (ret != u)
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v->counter += a;
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local_irq_restore(flags);
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return ret != u;
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("stc ccr,r1l\n\t"
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"orc #0x80,ccr\n\t"
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"mov.l %0,er0\n\t"
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"and.l %1,er0\n\t"
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"mov.l er0,%0\n\t"
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"ldc r1l,ccr"
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: "=m" (*v) : "g" (~(mask)) :"er0","er1");
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}
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static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("stc ccr,r1l\n\t"
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"orc #0x80,ccr\n\t"
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"mov.l %0,er0\n\t"
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"or.l %1,er0\n\t"
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"mov.l er0,%0\n\t"
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"ldc r1l,ccr"
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: "=m" (*v) : "g" (mask) :"er0","er1");
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}
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#endif /* __ARCH_H8300_ATOMIC __ */
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