765ae317ce
Fix use of uninitialized spinlocks, caught with spinlock debugging.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
712 lines
16 KiB
C
712 lines
16 KiB
C
/* $Id: traps.c,v 1.17 2004/05/02 01:46:30 sugioka Exp $
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*
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* linux/arch/sh/traps.c
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*
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* SuperH version: Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2000 Philipp Rumpf
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* Copyright (C) 2000 David Howells
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* Copyright (C) 2002, 2003 Paul Mundt
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*/
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/*
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* 'Traps.c' handles hardware traps and faults after we have saved some
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* state in 'entry.S'.
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*/
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include <linux/kallsyms.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/atomic.h>
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#include <asm/processor.h>
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#include <asm/sections.h>
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#ifdef CONFIG_SH_KGDB
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#include <asm/kgdb.h>
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#define CHK_REMOTE_DEBUG(regs) \
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{ \
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if ((kgdb_debug_hook != (kgdb_debug_hook_t *) NULL) && (!user_mode(regs))) \
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{ \
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(*kgdb_debug_hook)(regs); \
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} \
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}
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#else
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#define CHK_REMOTE_DEBUG(regs)
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#endif
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#define DO_ERROR(trapnr, signr, str, name, tsk) \
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asmlinkage void do_##name(unsigned long r4, unsigned long r5, \
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unsigned long r6, unsigned long r7, \
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struct pt_regs regs) \
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{ \
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unsigned long error_code; \
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\
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/* Check if it's a DSP instruction */ \
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if (is_dsp_inst(®s)) { \
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/* Enable DSP mode, and restart instruction. */ \
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regs.sr |= SR_DSP; \
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return; \
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} \
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\
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asm volatile("stc r2_bank, %0": "=r" (error_code)); \
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local_irq_enable(); \
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tsk->thread.error_code = error_code; \
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tsk->thread.trap_no = trapnr; \
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CHK_REMOTE_DEBUG(®s); \
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force_sig(signr, tsk); \
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die_if_no_fixup(str,®s,error_code); \
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}
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#ifdef CONFIG_CPU_SH2
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#define TRAP_RESERVED_INST 4
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#define TRAP_ILLEGAL_SLOT_INST 6
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#else
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#define TRAP_RESERVED_INST 12
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#define TRAP_ILLEGAL_SLOT_INST 13
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#endif
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/*
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* These constants are for searching for possible module text
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* segments. VMALLOC_OFFSET comes from mm/vmalloc.c; MODULE_RANGE is
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* a guess of how much space is likely to be vmalloced.
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*/
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#define VMALLOC_OFFSET (8*1024*1024)
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#define MODULE_RANGE (8*1024*1024)
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DEFINE_SPINLOCK(die_lock);
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void die(const char * str, struct pt_regs * regs, long err)
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{
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static int die_counter;
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console_verbose();
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spin_lock_irq(&die_lock);
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printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
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CHK_REMOTE_DEBUG(regs);
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show_regs(regs);
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spin_unlock_irq(&die_lock);
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do_exit(SIGSEGV);
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}
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static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
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{
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if (!user_mode(regs))
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die(str, regs, err);
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}
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static int handle_unaligned_notify_count = 10;
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/*
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* try and fix up kernelspace address errors
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* - userspace errors just cause EFAULT to be returned, resulting in SEGV
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* - kernel/userspace interfaces cause a jump to an appropriate handler
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* - other kernel errors are bad
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* - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault
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*/
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static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
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{
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if (!user_mode(regs))
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{
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const struct exception_table_entry *fixup;
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fixup = search_exception_tables(regs->pc);
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if (fixup) {
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regs->pc = fixup->fixup;
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return 0;
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}
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die(str, regs, err);
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}
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return -EFAULT;
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}
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/*
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* handle an instruction that does an unaligned memory access by emulating the
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* desired behaviour
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* - note that PC _may not_ point to the faulting instruction
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* (if that instruction is in a branch delay slot)
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* - return 0 if emulation okay, -EFAULT on existential error
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*/
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static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
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{
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int ret, index, count;
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unsigned long *rm, *rn;
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unsigned char *src, *dst;
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index = (instruction>>8)&15; /* 0x0F00 */
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rn = ®s->regs[index];
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index = (instruction>>4)&15; /* 0x00F0 */
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rm = ®s->regs[index];
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count = 1<<(instruction&3);
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ret = -EFAULT;
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switch (instruction>>12) {
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case 0: /* mov.[bwl] to/from memory via r0+rn */
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if (instruction & 8) {
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/* from memory */
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src = (unsigned char*) *rm;
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src += regs->regs[0];
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dst = (unsigned char*) rn;
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*(unsigned long*)dst = 0;
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#ifdef __LITTLE_ENDIAN__
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if (copy_from_user(dst, src, count))
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goto fetch_fault;
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if ((count == 2) && dst[1] & 0x80) {
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dst[2] = 0xff;
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dst[3] = 0xff;
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}
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#else
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dst += 4-count;
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if (__copy_user(dst, src, count))
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goto fetch_fault;
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if ((count == 2) && dst[2] & 0x80) {
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dst[0] = 0xff;
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dst[1] = 0xff;
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}
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#endif
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} else {
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/* to memory */
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src = (unsigned char*) rm;
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#if !defined(__LITTLE_ENDIAN__)
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src += 4-count;
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#endif
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dst = (unsigned char*) *rn;
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dst += regs->regs[0];
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if (copy_to_user(dst, src, count))
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goto fetch_fault;
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}
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ret = 0;
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break;
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case 1: /* mov.l Rm,@(disp,Rn) */
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src = (unsigned char*) rm;
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dst = (unsigned char*) *rn;
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dst += (instruction&0x000F)<<2;
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if (copy_to_user(dst,src,4))
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goto fetch_fault;
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ret = 0;
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break;
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case 2: /* mov.[bwl] to memory, possibly with pre-decrement */
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if (instruction & 4)
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*rn -= count;
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src = (unsigned char*) rm;
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dst = (unsigned char*) *rn;
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#if !defined(__LITTLE_ENDIAN__)
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src += 4-count;
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#endif
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if (copy_to_user(dst, src, count))
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goto fetch_fault;
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ret = 0;
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break;
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case 5: /* mov.l @(disp,Rm),Rn */
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src = (unsigned char*) *rm;
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src += (instruction&0x000F)<<2;
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dst = (unsigned char*) rn;
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*(unsigned long*)dst = 0;
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if (copy_from_user(dst,src,4))
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goto fetch_fault;
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ret = 0;
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break;
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case 6: /* mov.[bwl] from memory, possibly with post-increment */
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src = (unsigned char*) *rm;
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if (instruction & 4)
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*rm += count;
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dst = (unsigned char*) rn;
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*(unsigned long*)dst = 0;
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#ifdef __LITTLE_ENDIAN__
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if (copy_from_user(dst, src, count))
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goto fetch_fault;
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if ((count == 2) && dst[1] & 0x80) {
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dst[2] = 0xff;
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dst[3] = 0xff;
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}
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#else
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dst += 4-count;
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if (copy_from_user(dst, src, count))
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goto fetch_fault;
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if ((count == 2) && dst[2] & 0x80) {
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dst[0] = 0xff;
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dst[1] = 0xff;
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}
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#endif
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ret = 0;
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break;
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case 8:
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switch ((instruction&0xFF00)>>8) {
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case 0x81: /* mov.w R0,@(disp,Rn) */
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src = (unsigned char*) ®s->regs[0];
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#if !defined(__LITTLE_ENDIAN__)
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src += 2;
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#endif
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dst = (unsigned char*) *rm; /* called Rn in the spec */
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dst += (instruction&0x000F)<<1;
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if (copy_to_user(dst, src, 2))
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goto fetch_fault;
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ret = 0;
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break;
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case 0x85: /* mov.w @(disp,Rm),R0 */
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src = (unsigned char*) *rm;
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src += (instruction&0x000F)<<1;
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dst = (unsigned char*) ®s->regs[0];
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*(unsigned long*)dst = 0;
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#if !defined(__LITTLE_ENDIAN__)
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dst += 2;
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#endif
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if (copy_from_user(dst, src, 2))
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goto fetch_fault;
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#ifdef __LITTLE_ENDIAN__
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if (dst[1] & 0x80) {
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dst[2] = 0xff;
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dst[3] = 0xff;
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}
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#else
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if (dst[2] & 0x80) {
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dst[0] = 0xff;
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dst[1] = 0xff;
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}
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#endif
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ret = 0;
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break;
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}
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break;
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}
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return ret;
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fetch_fault:
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/* Argh. Address not only misaligned but also non-existent.
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* Raise an EFAULT and see if it's trapped
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*/
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return die_if_no_fixup("Fault in unaligned fixup", regs, 0);
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}
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/*
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* emulate the instruction in the delay slot
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* - fetches the instruction from PC+2
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*/
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static inline int handle_unaligned_delayslot(struct pt_regs *regs)
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{
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u16 instruction;
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if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) {
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/* the instruction-fetch faulted */
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if (user_mode(regs))
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return -EFAULT;
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/* kernel */
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die("delay-slot-insn faulting in handle_unaligned_delayslot", regs, 0);
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}
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return handle_unaligned_ins(instruction,regs);
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}
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/*
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* handle an instruction that does an unaligned memory access
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* - have to be careful of branch delay-slot instructions that fault
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* SH3:
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* - if the branch would be taken PC points to the branch
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* - if the branch would not be taken, PC points to delay-slot
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* SH4:
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* - PC always points to delayed branch
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* - return 0 if handled, -EFAULT if failed (may not return if in kernel)
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*/
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/* Macros to determine offset from current PC for branch instructions */
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/* Explicit type coercion is used to force sign extension where needed */
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#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
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#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
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static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
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{
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u_int rm;
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int ret, index;
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index = (instruction>>8)&15; /* 0x0F00 */
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rm = regs->regs[index];
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/* shout about the first ten userspace fixups */
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if (user_mode(regs) && handle_unaligned_notify_count>0) {
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handle_unaligned_notify_count--;
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printk("Fixing up unaligned userspace access in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
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current->comm,current->pid,(u16*)regs->pc,instruction);
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}
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ret = -EFAULT;
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switch (instruction&0xF000) {
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case 0x0000:
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if (instruction==0x000B) {
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/* rts */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0)
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regs->pc = regs->pr;
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}
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else if ((instruction&0x00FF)==0x0023) {
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/* braf @Rm */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0)
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regs->pc += rm + 4;
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}
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else if ((instruction&0x00FF)==0x0003) {
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/* bsrf @Rm */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0) {
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regs->pr = regs->pc + 4;
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regs->pc += rm + 4;
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}
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}
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else {
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/* mov.[bwl] to/from memory via r0+rn */
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goto simple;
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}
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break;
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case 0x1000: /* mov.l Rm,@(disp,Rn) */
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goto simple;
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case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */
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goto simple;
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case 0x4000:
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if ((instruction&0x00FF)==0x002B) {
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/* jmp @Rm */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0)
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regs->pc = rm;
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}
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else if ((instruction&0x00FF)==0x000B) {
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/* jsr @Rm */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0) {
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regs->pr = regs->pc + 4;
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regs->pc = rm;
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}
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}
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else {
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/* mov.[bwl] to/from memory via r0+rn */
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goto simple;
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}
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break;
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case 0x5000: /* mov.l @(disp,Rm),Rn */
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goto simple;
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case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */
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goto simple;
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case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */
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switch (instruction&0x0F00) {
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case 0x0100: /* mov.w R0,@(disp,Rm) */
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goto simple;
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case 0x0500: /* mov.w @(disp,Rm),R0 */
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goto simple;
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case 0x0B00: /* bf lab - no delayslot*/
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break;
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case 0x0F00: /* bf/s lab */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0) {
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#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
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if ((regs->sr & 0x00000001) != 0)
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regs->pc += 4; /* next after slot */
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else
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#endif
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regs->pc += SH_PC_8BIT_OFFSET(instruction);
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}
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break;
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case 0x0900: /* bt lab - no delayslot */
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break;
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case 0x0D00: /* bt/s lab */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0) {
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#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
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if ((regs->sr & 0x00000001) == 0)
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regs->pc += 4; /* next after slot */
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else
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#endif
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regs->pc += SH_PC_8BIT_OFFSET(instruction);
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}
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break;
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}
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break;
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case 0xA000: /* bra label */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0)
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regs->pc += SH_PC_12BIT_OFFSET(instruction);
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break;
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case 0xB000: /* bsr label */
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ret = handle_unaligned_delayslot(regs);
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if (ret==0) {
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regs->pr = regs->pc + 4;
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regs->pc += SH_PC_12BIT_OFFSET(instruction);
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}
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break;
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}
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return ret;
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/* handle non-delay-slot instruction */
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simple:
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ret = handle_unaligned_ins(instruction,regs);
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if (ret==0)
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regs->pc += 2;
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return ret;
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}
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/*
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* Handle various address error exceptions
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*/
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asmlinkage void do_address_error(struct pt_regs *regs,
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unsigned long writeaccess,
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unsigned long address)
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{
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unsigned long error_code;
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mm_segment_t oldfs;
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u16 instruction;
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int tmp;
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asm volatile("stc r2_bank,%0": "=r" (error_code));
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oldfs = get_fs();
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if (user_mode(regs)) {
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local_irq_enable();
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current->thread.error_code = error_code;
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current->thread.trap_no = (writeaccess) ? 8 : 7;
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/* bad PC is not something we can fix */
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if (regs->pc & 1)
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goto uspace_segv;
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set_fs(USER_DS);
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if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
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/* Argh. Fault on the instruction itself.
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This should never happen non-SMP
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*/
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set_fs(oldfs);
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goto uspace_segv;
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}
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tmp = handle_unaligned_access(instruction, regs);
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set_fs(oldfs);
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if (tmp==0)
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return; /* sorted */
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uspace_segv:
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printk(KERN_NOTICE "Killing process \"%s\" due to unaligned access\n", current->comm);
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force_sig(SIGSEGV, current);
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} else {
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if (regs->pc & 1)
|
|
die("unaligned program counter", regs, error_code);
|
|
|
|
set_fs(KERNEL_DS);
|
|
if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
|
|
/* Argh. Fault on the instruction itself.
|
|
This should never happen non-SMP
|
|
*/
|
|
set_fs(oldfs);
|
|
die("insn faulting in do_address_error", regs, 0);
|
|
}
|
|
|
|
handle_unaligned_access(instruction, regs);
|
|
set_fs(oldfs);
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_SH_DSP
|
|
/*
|
|
* SH-DSP support gerg@snapgear.com.
|
|
*/
|
|
int is_dsp_inst(struct pt_regs *regs)
|
|
{
|
|
unsigned short inst;
|
|
|
|
/*
|
|
* Safe guard if DSP mode is already enabled or we're lacking
|
|
* the DSP altogether.
|
|
*/
|
|
if (!(cpu_data->flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
|
|
return 0;
|
|
|
|
get_user(inst, ((unsigned short *) regs->pc));
|
|
|
|
inst &= 0xf000;
|
|
|
|
/* Check for any type of DSP or support instruction */
|
|
if ((inst == 0xf000) || (inst == 0x4000))
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define is_dsp_inst(regs) (0)
|
|
#endif /* CONFIG_SH_DSP */
|
|
|
|
DO_ERROR(TRAP_RESERVED_INST, SIGILL, "reserved instruction", reserved_inst, current)
|
|
DO_ERROR(TRAP_ILLEGAL_SLOT_INST, SIGILL, "illegal slot instruction", illegal_slot_inst, current)
|
|
|
|
asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
|
|
unsigned long r6, unsigned long r7,
|
|
struct pt_regs regs)
|
|
{
|
|
long ex;
|
|
asm volatile("stc r2_bank, %0" : "=r" (ex));
|
|
die_if_kernel("exception", ®s, ex);
|
|
}
|
|
|
|
#if defined(CONFIG_SH_STANDARD_BIOS)
|
|
void *gdb_vbr_vector;
|
|
|
|
static inline void __init gdb_vbr_init(void)
|
|
{
|
|
register unsigned long vbr;
|
|
|
|
/*
|
|
* Read the old value of the VBR register to initialise
|
|
* the vector through which debug and BIOS traps are
|
|
* delegated by the Linux trap handler.
|
|
*/
|
|
asm volatile("stc vbr, %0" : "=r" (vbr));
|
|
|
|
gdb_vbr_vector = (void *)(vbr + 0x100);
|
|
printk("Setting GDB trap vector to 0x%08lx\n",
|
|
(unsigned long)gdb_vbr_vector);
|
|
}
|
|
#endif
|
|
|
|
void __init per_cpu_trap_init(void)
|
|
{
|
|
extern void *vbr_base;
|
|
|
|
#ifdef CONFIG_SH_STANDARD_BIOS
|
|
gdb_vbr_init();
|
|
#endif
|
|
|
|
/* NOTE: The VBR value should be at P1
|
|
(or P2, virtural "fixed" address space).
|
|
It's definitely should not in physical address. */
|
|
|
|
asm volatile("ldc %0, vbr"
|
|
: /* no output */
|
|
: "r" (&vbr_base)
|
|
: "memory");
|
|
}
|
|
|
|
void __init trap_init(void)
|
|
{
|
|
extern void *exception_handling_table[];
|
|
|
|
exception_handling_table[TRAP_RESERVED_INST]
|
|
= (void *)do_reserved_inst;
|
|
exception_handling_table[TRAP_ILLEGAL_SLOT_INST]
|
|
= (void *)do_illegal_slot_inst;
|
|
|
|
#ifdef CONFIG_CPU_SH4
|
|
if (!(cpu_data->flags & CPU_HAS_FPU)) {
|
|
/* For SH-4 lacking an FPU, treat floating point instructions
|
|
as reserved. */
|
|
/* entry 64 corresponds to EXPEVT=0x800 */
|
|
exception_handling_table[64] = (void *)do_reserved_inst;
|
|
exception_handling_table[65] = (void *)do_illegal_slot_inst;
|
|
}
|
|
#endif
|
|
|
|
/* Setup VBR for boot cpu */
|
|
per_cpu_trap_init();
|
|
}
|
|
|
|
void show_stack(struct task_struct *tsk, unsigned long *sp)
|
|
{
|
|
unsigned long *stack, addr;
|
|
unsigned long module_start = VMALLOC_START;
|
|
unsigned long module_end = VMALLOC_END;
|
|
int i = 1;
|
|
|
|
if (tsk && !sp) {
|
|
sp = (unsigned long *)tsk->thread.sp;
|
|
}
|
|
|
|
if (!sp) {
|
|
__asm__ __volatile__ (
|
|
"mov r15, %0\n\t"
|
|
"stc r7_bank, %1\n\t"
|
|
: "=r" (module_start),
|
|
"=r" (module_end)
|
|
);
|
|
|
|
sp = (unsigned long *)module_start;
|
|
}
|
|
|
|
stack = sp;
|
|
|
|
printk("\nCall trace: ");
|
|
#ifdef CONFIG_KALLSYMS
|
|
printk("\n");
|
|
#endif
|
|
|
|
while (!kstack_end(stack)) {
|
|
addr = *stack++;
|
|
if (((addr >= (unsigned long)_text) &&
|
|
(addr <= (unsigned long)_etext)) ||
|
|
((addr >= module_start) && (addr <= module_end))) {
|
|
/*
|
|
* For 80-columns display, 6 entry is maximum.
|
|
* NOTE: '[<8c00abcd>] ' consumes 13 columns .
|
|
*/
|
|
#ifndef CONFIG_KALLSYMS
|
|
if (i && ((i % 6) == 0))
|
|
printk("\n ");
|
|
#endif
|
|
printk("[<%08lx>] ", addr);
|
|
print_symbol("%s\n", addr);
|
|
i++;
|
|
}
|
|
}
|
|
|
|
printk("\n");
|
|
}
|
|
|
|
void show_task(unsigned long *sp)
|
|
{
|
|
show_stack(NULL, sp);
|
|
}
|
|
|
|
void dump_stack(void)
|
|
{
|
|
show_stack(NULL, NULL);
|
|
}
|
|
EXPORT_SYMBOL(dump_stack);
|