69d88a00a2
This patch adds common register access for 24xx and 34xx power and clock management in order to share code between 24xx and 34xx. Only change USB platform init code to use new register access, other access will be changed in later patches. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
75 lines
1.5 KiB
C
75 lines
1.5 KiB
C
/*
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* OMAP2/3 System Control Module register access
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*
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* Copyright (C) 2007 Texas Instruments, Inc.
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* Copyright (C) 2007 Nokia Corporation
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*
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* Written by Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <asm/io.h>
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#include <asm/arch/control.h>
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static u32 omap2_ctrl_base;
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#define OMAP_CTRL_REGADDR(reg) (void __iomem *)IO_ADDRESS(omap2_ctrl_base \
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+ (reg))
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void omap_ctrl_base_set(u32 base)
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{
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omap2_ctrl_base = base;
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}
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u32 omap_ctrl_base_get(void)
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{
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return omap2_ctrl_base;
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}
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u8 omap_ctrl_readb(u16 offset)
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{
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return __raw_readb(OMAP_CTRL_REGADDR(offset));
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}
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u16 omap_ctrl_readw(u16 offset)
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{
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return __raw_readw(OMAP_CTRL_REGADDR(offset));
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}
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u32 omap_ctrl_readl(u16 offset)
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{
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return __raw_readl(OMAP_CTRL_REGADDR(offset));
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}
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void omap_ctrl_writeb(u8 val, u16 offset)
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{
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pr_debug("omap_ctrl_writeb: writing 0x%0x to 0x%0x\n", val,
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(u32)OMAP_CTRL_REGADDR(offset));
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__raw_writeb(val, OMAP_CTRL_REGADDR(offset));
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}
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void omap_ctrl_writew(u16 val, u16 offset)
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{
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pr_debug("omap_ctrl_writew: writing 0x%0x to 0x%0x\n", val,
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(u32)OMAP_CTRL_REGADDR(offset));
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__raw_writew(val, OMAP_CTRL_REGADDR(offset));
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}
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void omap_ctrl_writel(u32 val, u16 offset)
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{
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pr_debug("omap_ctrl_writel: writing 0x%0x to 0x%0x\n", val,
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(u32)OMAP_CTRL_REGADDR(offset));
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__raw_writel(val, OMAP_CTRL_REGADDR(offset));
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}
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