5bf3df3f00
The remaining registers are separated into: - <mach/regs-ost.h> - <mach/regs-rtc.h> - <mach/regs-intc.h> and then we can remove pxa-regs.h completely. Instead of #include this file, let's: 1. include the specific <mach/regs-*.h> with care (if that's absolutely necessary) 2. define the registers in the driver, make cleanly defined API to expose the register access to external with sufficient reason Signed-off-by: Eric Miao <eric.miao@marvell.com>
192 lines
4.7 KiB
C
192 lines
4.7 KiB
C
/*
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* Battery and Power Management code for the Sharp SL-C7xx and SL-Cxx00
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* series of PDAs
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*
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* Copyright (c) 2004-2005 Richard Purdie
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*
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* Based on code written by Sharp for 2.4 kernels
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#undef DEBUG
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/apm-emulation.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <mach/pm.h>
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#include <mach/pxa2xx-gpio.h>
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#include <mach/sharpsl.h>
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#include "sharpsl.h"
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struct battery_thresh spitz_battery_levels_acin[] = {
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{ 213, 100},
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{ 212, 98},
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{ 211, 95},
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{ 210, 93},
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{ 209, 90},
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{ 208, 88},
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{ 207, 85},
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{ 206, 83},
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{ 205, 80},
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{ 204, 78},
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{ 203, 75},
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{ 202, 73},
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{ 201, 70},
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{ 200, 68},
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{ 199, 65},
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{ 198, 63},
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{ 197, 60},
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{ 196, 58},
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{ 195, 55},
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{ 194, 53},
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{ 193, 50},
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{ 192, 48},
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{ 192, 45},
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{ 191, 43},
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{ 191, 40},
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{ 190, 38},
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{ 190, 35},
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{ 189, 33},
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{ 188, 30},
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{ 187, 28},
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{ 186, 25},
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{ 185, 23},
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{ 184, 20},
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{ 183, 18},
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{ 182, 15},
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{ 181, 13},
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{ 180, 10},
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{ 179, 8},
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{ 178, 5},
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{ 0, 0},
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};
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struct battery_thresh spitz_battery_levels_noac[] = {
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{ 213, 100},
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{ 212, 98},
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{ 211, 95},
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{ 210, 93},
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{ 209, 90},
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{ 208, 88},
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{ 207, 85},
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{ 206, 83},
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{ 205, 80},
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{ 204, 78},
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{ 203, 75},
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{ 202, 73},
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{ 201, 70},
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{ 200, 68},
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{ 199, 65},
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{ 198, 63},
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{ 197, 60},
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{ 196, 58},
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{ 195, 55},
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{ 194, 53},
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{ 193, 50},
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{ 192, 48},
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{ 191, 45},
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{ 190, 43},
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{ 189, 40},
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{ 188, 38},
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{ 187, 35},
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{ 186, 33},
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{ 185, 30},
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{ 184, 28},
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{ 183, 25},
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{ 182, 23},
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{ 181, 20},
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{ 180, 18},
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{ 179, 15},
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{ 178, 13},
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{ 177, 10},
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{ 176, 8},
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{ 175, 5},
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{ 0, 0},
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};
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/* MAX1111 Commands */
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#define MAXCTRL_PD0 1u << 0
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#define MAXCTRL_PD1 1u << 1
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#define MAXCTRL_SGL 1u << 2
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#define MAXCTRL_UNI 1u << 3
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#define MAXCTRL_SEL_SH 4
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#define MAXCTRL_STR 1u << 7
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/*
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* Read MAX1111 ADC
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*/
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int sharpsl_pm_pxa_read_max1111(int channel)
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{
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if (machine_is_tosa()) // Ugly, better move this function into another module
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return 0;
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#ifdef CONFIG_CORGI_SSP_DEPRECATED
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return corgi_ssp_max1111_get((channel << MAXCTRL_SEL_SH) | MAXCTRL_PD0 | MAXCTRL_PD1
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| MAXCTRL_SGL | MAXCTRL_UNI | MAXCTRL_STR);
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#else
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extern int max1111_read_channel(int);
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/* max1111 accepts channels from 0-3, however,
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* it is encoded from 0-7 here in the code.
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*/
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return max1111_read_channel(channel >> 1);
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#endif
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}
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void sharpsl_pm_pxa_init(void)
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{
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pxa_gpio_mode(sharpsl_pm.machinfo->gpio_acin | GPIO_IN);
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pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batfull | GPIO_IN);
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pxa_gpio_mode(sharpsl_pm.machinfo->gpio_batlock | GPIO_IN);
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/* Register interrupt handlers */
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if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED, "AC Input Detect", sharpsl_ac_isr)) {
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dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin));
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}
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else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin),IRQ_TYPE_EDGE_BOTH);
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if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED, "Battery Cover", sharpsl_fatal_isr)) {
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dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock));
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}
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else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock),IRQ_TYPE_EDGE_FALLING);
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if (sharpsl_pm.machinfo->gpio_fatal) {
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if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED, "Fatal Battery", sharpsl_fatal_isr)) {
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dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal));
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}
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else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal),IRQ_TYPE_EDGE_FALLING);
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}
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if (sharpsl_pm.machinfo->batfull_irq)
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{
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/* Register interrupt handler. */
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if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED, "CO", sharpsl_chrg_full_isr)) {
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dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull));
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}
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else set_irq_type(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull),IRQ_TYPE_EDGE_RISING);
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}
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}
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void sharpsl_pm_pxa_remove(void)
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{
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free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
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free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
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if (sharpsl_pm.machinfo->gpio_fatal)
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free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
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if (sharpsl_pm.machinfo->batfull_irq)
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free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
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}
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