859 lines
22 KiB
C
859 lines
22 KiB
C
/* cpwatchdog.c - driver implementation for hardware watchdog
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* timers found on Sun Microsystems CP1400 and CP1500 boards.
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*
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* This device supports both the generic Linux watchdog
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* interface and Solaris-compatible ioctls as best it is
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* able.
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*
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* NOTE: CP1400 systems appear to have a defective intr_mask
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* register on the PLD, preventing the disabling of
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* timer interrupts. We use a timer to periodically
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* reset 'stopped' watchdogs on affected platforms.
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*
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* Copyright (c) 2000 Eric Brower (ebrower@usa.net)
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/major.h>
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#include <linux/init.h>
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#include <linux/miscdevice.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/timer.h>
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#include <linux/smp_lock.h>
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#include <linux/io.h>
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#include <asm/irq.h>
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#include <asm/ebus.h>
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#include <asm/oplib.h>
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#include <asm/uaccess.h>
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#include <asm/watchdog.h>
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#define WD_OBPNAME "watchdog"
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#define WD_BADMODEL "SUNW,501-5336"
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#define WD_BTIMEOUT (jiffies + (HZ * 1000))
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#define WD_BLIMIT 0xFFFF
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#define WD0_DEVNAME "watchdog0"
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#define WD1_DEVNAME "watchdog1"
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#define WD2_DEVNAME "watchdog2"
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#define WD0_MINOR 212
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#define WD1_MINOR 213
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#define WD2_MINOR 214
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/* Internal driver definitions
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*/
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#define WD0_ID 0 /* Watchdog0 */
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#define WD1_ID 1 /* Watchdog1 */
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#define WD2_ID 2 /* Watchdog2 */
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#define WD_NUMDEVS 3 /* Device contains 3 timers */
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#define WD_INTR_OFF 0 /* Interrupt disable value */
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#define WD_INTR_ON 1 /* Interrupt enable value */
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#define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
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#define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
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#define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
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/* Register value definitions
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*/
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#define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
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#define WD1_INTR_MASK 0x02
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#define WD2_INTR_MASK 0x04
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#define WD_S_RUNNING 0x01 /* Watchdog device status running */
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#define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
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/* Sun uses Altera PLD EPF8820ATC144-4
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* providing three hardware watchdogs:
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*
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* 1) RIC - sends an interrupt when triggered
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* 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
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* 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
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*
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*** Timer register block definition (struct wd_timer_regblk)
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*
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* dcntr and limit registers (halfword access):
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* -------------------
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* | 15 | ...| 1 | 0 |
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* -------------------
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* |- counter val -|
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* -------------------
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* dcntr - Current 16-bit downcounter value.
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* When downcounter reaches '0' watchdog expires.
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* Reading this register resets downcounter with 'limit' value.
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* limit - 16-bit countdown value in 1/10th second increments.
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* Writing this register begins countdown with input value.
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* Reading from this register does not affect counter.
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* NOTES: After watchdog reset, dcntr and limit contain '1'
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*
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* status register (byte access):
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* ---------------------------
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* | 7 | ... | 2 | 1 | 0 |
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* --------------+------------
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* |- UNUSED -| EXP | RUN |
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* ---------------------------
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* status- Bit 0 - Watchdog is running
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* Bit 1 - Watchdog has expired
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*
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*** PLD register block definition (struct wd_pld_regblk)
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*
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* intr_mask register (byte access):
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* ---------------------------------
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* | 7 | ... | 3 | 2 | 1 | 0 |
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* +-------------+------------------
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* |- UNUSED -| WD3 | WD2 | WD1 |
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* ---------------------------------
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* WD3 - 1 == Interrupt disabled for watchdog 3
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* WD2 - 1 == Interrupt disabled for watchdog 2
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* WD1 - 1 == Interrupt disabled for watchdog 1
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*
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* pld_status register (byte access):
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* UNKNOWN, MAGICAL MYSTERY REGISTER
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*
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*/
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#define WD_TIMER_REGSZ 16
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#define WD0_OFF 0
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#define WD1_OFF (WD_TIMER_REGSZ * 1)
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#define WD2_OFF (WD_TIMER_REGSZ * 2)
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#define PLD_OFF (WD_TIMER_REGSZ * 3)
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#define WD_DCNTR 0x00
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#define WD_LIMIT 0x04
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#define WD_STATUS 0x08
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#define PLD_IMASK (PLD_OFF + 0x00)
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#define PLD_STATUS (PLD_OFF + 0x04)
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/* Individual timer structure
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*/
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struct wd_timer {
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__u16 timeout;
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__u8 intr_mask;
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unsigned char runstatus;
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void __iomem *regs;
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};
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/* Device structure
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*/
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struct wd_device {
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int irq;
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spinlock_t lock;
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unsigned char isbaddoggie; /* defective PLD */
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unsigned char opt_enable;
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unsigned char opt_reboot;
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unsigned short opt_timeout;
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unsigned char initialized;
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struct wd_timer watchdog[WD_NUMDEVS];
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void __iomem *regs;
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};
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static struct wd_device wd_dev = {
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0, __SPIN_LOCK_UNLOCKED(wd_dev.lock), 0, 0, 0, 0,
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};
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static struct timer_list wd_timer;
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static int wd0_timeout = 0;
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static int wd1_timeout = 0;
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static int wd2_timeout = 0;
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#ifdef MODULE
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module_param (wd0_timeout, int, 0);
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MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
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module_param (wd1_timeout, int, 0);
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MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
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module_param (wd2_timeout, int, 0);
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MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
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MODULE_AUTHOR
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("Eric Brower <ebrower@usa.net>");
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MODULE_DESCRIPTION
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("Hardware watchdog driver for Sun Microsystems CP1400/1500");
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MODULE_LICENSE("GPL");
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MODULE_SUPPORTED_DEVICE
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("watchdog");
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#endif /* ifdef MODULE */
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/* Forward declarations of internal methods
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*/
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#ifdef WD_DEBUG
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static void wd_dumpregs(void);
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#endif
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static irqreturn_t wd_interrupt(int irq, void *dev_id);
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static void wd_toggleintr(struct wd_timer* pTimer, int enable);
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static void wd_pingtimer(struct wd_timer* pTimer);
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static void wd_starttimer(struct wd_timer* pTimer);
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static void wd_resetbrokentimer(struct wd_timer* pTimer);
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static void wd_stoptimer(struct wd_timer* pTimer);
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static void wd_brokentimer(unsigned long data);
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static int wd_getstatus(struct wd_timer* pTimer);
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/* PLD expects words to be written in LSB format,
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* so we must flip all words prior to writing them to regs
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*/
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static inline unsigned short flip_word(unsigned short word)
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{
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return ((word & 0xff) << 8) | ((word >> 8) & 0xff);
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}
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#define wd_writew(val, addr) (writew(flip_word(val), addr))
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#define wd_readw(addr) (flip_word(readw(addr)))
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#define wd_writeb(val, addr) (writeb(val, addr))
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#define wd_readb(addr) (readb(addr))
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/* CP1400s seem to have broken PLD implementations--
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* the interrupt_mask register cannot be written, so
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* no timer interrupts can be masked within the PLD.
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*/
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static inline int wd_isbroken(void)
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{
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/* we could test this by read/write/read/restore
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* on the interrupt mask register only if OBP
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* 'watchdog-enable?' == FALSE, but it seems
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* ubiquitous on CP1400s
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*/
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char val[32];
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prom_getproperty(prom_root_node, "model", val, sizeof(val));
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return((!strcmp(val, WD_BADMODEL)) ? 1 : 0);
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}
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/* Retrieve watchdog-enable? option from OBP
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* Returns 0 if false, 1 if true
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*/
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static inline int wd_opt_enable(void)
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{
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int opt_node;
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opt_node = prom_getchild(prom_root_node);
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opt_node = prom_searchsiblings(opt_node, "options");
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return((-1 == prom_getint(opt_node, "watchdog-enable?")) ? 0 : 1);
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}
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/* Retrieve watchdog-reboot? option from OBP
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* Returns 0 if false, 1 if true
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*/
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static inline int wd_opt_reboot(void)
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{
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int opt_node;
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opt_node = prom_getchild(prom_root_node);
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opt_node = prom_searchsiblings(opt_node, "options");
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return((-1 == prom_getint(opt_node, "watchdog-reboot?")) ? 0 : 1);
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}
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/* Retrieve watchdog-timeout option from OBP
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* Returns OBP value, or 0 if not located
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*/
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static inline int wd_opt_timeout(void)
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{
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int opt_node;
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char value[32];
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char *p = value;
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opt_node = prom_getchild(prom_root_node);
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opt_node = prom_searchsiblings(opt_node, "options");
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opt_node = prom_getproperty(opt_node,
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"watchdog-timeout",
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value,
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sizeof(value));
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if(-1 != opt_node) {
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/* atoi implementation */
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for(opt_node = 0; /* nop */; p++) {
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if(*p >= '0' && *p <= '9') {
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opt_node = (10*opt_node)+(*p-'0');
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}
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else {
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break;
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}
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}
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}
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return((-1 == opt_node) ? (0) : (opt_node));
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}
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static int wd_open(struct inode *inode, struct file *f)
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{
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lock_kernel();
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switch(iminor(inode))
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{
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case WD0_MINOR:
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f->private_data = &wd_dev.watchdog[WD0_ID];
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break;
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case WD1_MINOR:
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f->private_data = &wd_dev.watchdog[WD1_ID];
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break;
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case WD2_MINOR:
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f->private_data = &wd_dev.watchdog[WD2_ID];
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break;
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default:
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unlock_kernel();
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return(-ENODEV);
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}
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/* Register IRQ on first open of device */
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if(0 == wd_dev.initialized)
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{
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if (request_irq(wd_dev.irq,
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&wd_interrupt,
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IRQF_SHARED,
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WD_OBPNAME,
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(void *)wd_dev.regs)) {
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printk("%s: Cannot register IRQ %d\n",
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WD_OBPNAME, wd_dev.irq);
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unlock_kernel();
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return(-EBUSY);
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}
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wd_dev.initialized = 1;
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}
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unlock_kernel();
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return(nonseekable_open(inode, f));
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}
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static int wd_release(struct inode *inode, struct file *file)
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{
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return 0;
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}
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static int wd_ioctl(struct inode *inode, struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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int setopt = 0;
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struct wd_timer* pTimer = (struct wd_timer*)file->private_data;
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void __user *argp = (void __user *)arg;
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struct watchdog_info info = {
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0,
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0,
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"Altera EPF8820ATC144-4"
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};
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if(NULL == pTimer) {
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return(-EINVAL);
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}
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switch(cmd)
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{
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/* Generic Linux IOCTLs */
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case WDIOC_GETSUPPORT:
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if(copy_to_user(argp, &info, sizeof(struct watchdog_info))) {
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return(-EFAULT);
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}
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break;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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if (put_user(0, (int __user *)argp))
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return -EFAULT;
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break;
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case WDIOC_KEEPALIVE:
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wd_pingtimer(pTimer);
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break;
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case WDIOC_SETOPTIONS:
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if(copy_from_user(&setopt, argp, sizeof(unsigned int))) {
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return -EFAULT;
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}
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if(setopt & WDIOS_DISABLECARD) {
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if(wd_dev.opt_enable) {
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printk(
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"%s: cannot disable watchdog in ENABLED mode\n",
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WD_OBPNAME);
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return(-EINVAL);
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}
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wd_stoptimer(pTimer);
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}
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else if(setopt & WDIOS_ENABLECARD) {
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wd_starttimer(pTimer);
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}
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else {
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return(-EINVAL);
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}
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break;
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/* Solaris-compatible IOCTLs */
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case WIOCGSTAT:
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setopt = wd_getstatus(pTimer);
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if(copy_to_user(argp, &setopt, sizeof(unsigned int))) {
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return(-EFAULT);
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}
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break;
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case WIOCSTART:
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wd_starttimer(pTimer);
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break;
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case WIOCSTOP:
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if(wd_dev.opt_enable) {
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printk("%s: cannot disable watchdog in ENABLED mode\n",
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WD_OBPNAME);
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return(-EINVAL);
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}
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wd_stoptimer(pTimer);
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break;
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default:
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return(-EINVAL);
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}
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return(0);
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}
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static long wd_compat_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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int rval = -ENOIOCTLCMD;
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switch (cmd) {
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/* solaris ioctls are specific to this driver */
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case WIOCSTART:
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case WIOCSTOP:
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case WIOCGSTAT:
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lock_kernel();
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rval = wd_ioctl(file->f_path.dentry->d_inode, file, cmd, arg);
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unlock_kernel();
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break;
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/* everything else is handled by the generic compat layer */
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default:
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break;
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}
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return rval;
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}
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static ssize_t wd_write(struct file *file,
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const char __user *buf,
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size_t count,
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loff_t *ppos)
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{
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struct wd_timer* pTimer = (struct wd_timer*)file->private_data;
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if(NULL == pTimer) {
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return(-EINVAL);
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}
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if (count) {
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wd_pingtimer(pTimer);
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return 1;
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}
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return 0;
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}
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static ssize_t wd_read(struct file * file, char __user *buffer,
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size_t count, loff_t *ppos)
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{
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#ifdef WD_DEBUG
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wd_dumpregs();
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return(0);
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#else
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return(-EINVAL);
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#endif /* ifdef WD_DEBUG */
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}
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static irqreturn_t wd_interrupt(int irq, void *dev_id)
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{
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/* Only WD0 will interrupt-- others are NMI and we won't
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* see them here....
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*/
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spin_lock_irq(&wd_dev.lock);
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if((unsigned long)wd_dev.regs == (unsigned long)dev_id)
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{
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wd_stoptimer(&wd_dev.watchdog[WD0_ID]);
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wd_dev.watchdog[WD0_ID].runstatus |= WD_STAT_SVCD;
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}
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spin_unlock_irq(&wd_dev.lock);
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return IRQ_HANDLED;
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}
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static const struct file_operations wd_fops = {
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.owner = THIS_MODULE,
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.ioctl = wd_ioctl,
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.compat_ioctl = wd_compat_ioctl,
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.open = wd_open,
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.write = wd_write,
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.read = wd_read,
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.release = wd_release,
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};
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static struct miscdevice wd0_miscdev = { WD0_MINOR, WD0_DEVNAME, &wd_fops };
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static struct miscdevice wd1_miscdev = { WD1_MINOR, WD1_DEVNAME, &wd_fops };
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static struct miscdevice wd2_miscdev = { WD2_MINOR, WD2_DEVNAME, &wd_fops };
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#ifdef WD_DEBUG
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static void wd_dumpregs(void)
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{
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/* Reading from downcounters initiates watchdog countdown--
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* Example is included below for illustration purposes.
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*/
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int i;
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printk("%s: dumping register values\n", WD_OBPNAME);
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for(i = WD0_ID; i < WD_NUMDEVS; ++i) {
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/* printk("\t%s%i: dcntr at 0x%lx: 0x%x\n",
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* WD_OBPNAME,
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* i,
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* (unsigned long)(&wd_dev.watchdog[i].regs->dcntr),
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* readw(&wd_dev.watchdog[i].regs->dcntr));
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*/
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printk("\t%s%i: limit at 0x%lx: 0x%x\n",
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WD_OBPNAME,
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i,
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(unsigned long)(&wd_dev.watchdog[i].regs->limit),
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readw(&wd_dev.watchdog[i].regs->limit));
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printk("\t%s%i: status at 0x%lx: 0x%x\n",
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WD_OBPNAME,
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i,
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(unsigned long)(&wd_dev.watchdog[i].regs->status),
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readb(&wd_dev.watchdog[i].regs->status));
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printk("\t%s%i: driver status: 0x%x\n",
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WD_OBPNAME,
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i,
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wd_getstatus(&wd_dev.watchdog[i]));
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}
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printk("\tintr_mask at %p: 0x%x\n",
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wd_dev.regs + PLD_IMASK,
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readb(wd_dev.regs + PLD_IMASK));
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printk("\tpld_status at %p: 0x%x\n",
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wd_dev.regs + PLD_STATUS,
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readb(wd_dev.regs + PLD_STATUS));
|
|
}
|
|
#endif
|
|
|
|
/* Enable or disable watchdog interrupts
|
|
* Because of the CP1400 defect this should only be
|
|
* called during initialzation or by wd_[start|stop]timer()
|
|
*
|
|
* pTimer - pointer to timer device, or NULL to indicate all timers
|
|
* enable - non-zero to enable interrupts, zero to disable
|
|
*/
|
|
static void wd_toggleintr(struct wd_timer* pTimer, int enable)
|
|
{
|
|
unsigned char curregs = wd_readb(wd_dev.regs + PLD_IMASK);
|
|
unsigned char setregs =
|
|
(NULL == pTimer) ?
|
|
(WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
|
|
(pTimer->intr_mask);
|
|
|
|
(WD_INTR_ON == enable) ?
|
|
(curregs &= ~setregs):
|
|
(curregs |= setregs);
|
|
|
|
wd_writeb(curregs, wd_dev.regs + PLD_IMASK);
|
|
return;
|
|
}
|
|
|
|
/* Reset countdown timer with 'limit' value and continue countdown.
|
|
* This will not start a stopped timer.
|
|
*
|
|
* pTimer - pointer to timer device
|
|
*/
|
|
static void wd_pingtimer(struct wd_timer* pTimer)
|
|
{
|
|
if (wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) {
|
|
wd_readw(pTimer->regs + WD_DCNTR);
|
|
}
|
|
}
|
|
|
|
/* Stop a running watchdog timer-- the timer actually keeps
|
|
* running, but the interrupt is masked so that no action is
|
|
* taken upon expiration.
|
|
*
|
|
* pTimer - pointer to timer device
|
|
*/
|
|
static void wd_stoptimer(struct wd_timer* pTimer)
|
|
{
|
|
if(wd_readb(pTimer->regs + WD_STATUS) & WD_S_RUNNING) {
|
|
wd_toggleintr(pTimer, WD_INTR_OFF);
|
|
|
|
if(wd_dev.isbaddoggie) {
|
|
pTimer->runstatus |= WD_STAT_BSTOP;
|
|
wd_brokentimer((unsigned long)&wd_dev);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Start a watchdog timer with the specified limit value
|
|
* If the watchdog is running, it will be restarted with
|
|
* the provided limit value.
|
|
*
|
|
* This function will enable interrupts on the specified
|
|
* watchdog.
|
|
*
|
|
* pTimer - pointer to timer device
|
|
* limit - limit (countdown) value in 1/10th seconds
|
|
*/
|
|
static void wd_starttimer(struct wd_timer* pTimer)
|
|
{
|
|
if(wd_dev.isbaddoggie) {
|
|
pTimer->runstatus &= ~WD_STAT_BSTOP;
|
|
}
|
|
pTimer->runstatus &= ~WD_STAT_SVCD;
|
|
|
|
wd_writew(pTimer->timeout, pTimer->regs + WD_LIMIT);
|
|
wd_toggleintr(pTimer, WD_INTR_ON);
|
|
}
|
|
|
|
/* Restarts timer with maximum limit value and
|
|
* does not unset 'brokenstop' value.
|
|
*/
|
|
static void wd_resetbrokentimer(struct wd_timer* pTimer)
|
|
{
|
|
wd_toggleintr(pTimer, WD_INTR_ON);
|
|
wd_writew(WD_BLIMIT, pTimer->regs + WD_LIMIT);
|
|
}
|
|
|
|
/* Timer device initialization helper.
|
|
* Returns 0 on success, other on failure
|
|
*/
|
|
static int wd_inittimer(int whichdog)
|
|
{
|
|
struct miscdevice *whichmisc;
|
|
void __iomem *whichregs;
|
|
char whichident[8];
|
|
int whichmask;
|
|
__u16 whichlimit;
|
|
|
|
switch(whichdog)
|
|
{
|
|
case WD0_ID:
|
|
whichmisc = &wd0_miscdev;
|
|
strcpy(whichident, "RIC");
|
|
whichregs = wd_dev.regs + WD0_OFF;
|
|
whichmask = WD0_INTR_MASK;
|
|
whichlimit= (0 == wd0_timeout) ?
|
|
(wd_dev.opt_timeout):
|
|
(wd0_timeout);
|
|
break;
|
|
case WD1_ID:
|
|
whichmisc = &wd1_miscdev;
|
|
strcpy(whichident, "XIR");
|
|
whichregs = wd_dev.regs + WD1_OFF;
|
|
whichmask = WD1_INTR_MASK;
|
|
whichlimit= (0 == wd1_timeout) ?
|
|
(wd_dev.opt_timeout):
|
|
(wd1_timeout);
|
|
break;
|
|
case WD2_ID:
|
|
whichmisc = &wd2_miscdev;
|
|
strcpy(whichident, "POR");
|
|
whichregs = wd_dev.regs + WD2_OFF;
|
|
whichmask = WD2_INTR_MASK;
|
|
whichlimit= (0 == wd2_timeout) ?
|
|
(wd_dev.opt_timeout):
|
|
(wd2_timeout);
|
|
break;
|
|
default:
|
|
printk("%s: %s: invalid watchdog id: %i\n",
|
|
WD_OBPNAME, __func__, whichdog);
|
|
return(1);
|
|
}
|
|
if(0 != misc_register(whichmisc))
|
|
{
|
|
return(1);
|
|
}
|
|
wd_dev.watchdog[whichdog].regs = whichregs;
|
|
wd_dev.watchdog[whichdog].timeout = whichlimit;
|
|
wd_dev.watchdog[whichdog].intr_mask = whichmask;
|
|
wd_dev.watchdog[whichdog].runstatus &= ~WD_STAT_BSTOP;
|
|
wd_dev.watchdog[whichdog].runstatus |= WD_STAT_INIT;
|
|
|
|
printk("%s%i: %s hardware watchdog [%01i.%i sec] %s\n",
|
|
WD_OBPNAME,
|
|
whichdog,
|
|
whichident,
|
|
wd_dev.watchdog[whichdog].timeout / 10,
|
|
wd_dev.watchdog[whichdog].timeout % 10,
|
|
(0 != wd_dev.opt_enable) ? "in ENABLED mode" : "");
|
|
return(0);
|
|
}
|
|
|
|
/* Timer method called to reset stopped watchdogs--
|
|
* because of the PLD bug on CP1400, we cannot mask
|
|
* interrupts within the PLD so me must continually
|
|
* reset the timers ad infinitum.
|
|
*/
|
|
static void wd_brokentimer(unsigned long data)
|
|
{
|
|
struct wd_device* pDev = (struct wd_device*)data;
|
|
int id, tripped = 0;
|
|
|
|
/* kill a running timer instance, in case we
|
|
* were called directly instead of by kernel timer
|
|
*/
|
|
if(timer_pending(&wd_timer)) {
|
|
del_timer(&wd_timer);
|
|
}
|
|
|
|
for(id = WD0_ID; id < WD_NUMDEVS; ++id) {
|
|
if(pDev->watchdog[id].runstatus & WD_STAT_BSTOP) {
|
|
++tripped;
|
|
wd_resetbrokentimer(&pDev->watchdog[id]);
|
|
}
|
|
}
|
|
|
|
if(tripped) {
|
|
/* there is at least one timer brokenstopped-- reschedule */
|
|
init_timer(&wd_timer);
|
|
wd_timer.expires = WD_BTIMEOUT;
|
|
add_timer(&wd_timer);
|
|
}
|
|
}
|
|
|
|
static int wd_getstatus(struct wd_timer* pTimer)
|
|
{
|
|
unsigned char stat = wd_readb(pTimer->regs + WD_STATUS);
|
|
unsigned char intr = wd_readb(wd_dev.regs + PLD_IMASK);
|
|
unsigned char ret = WD_STOPPED;
|
|
|
|
/* determine STOPPED */
|
|
if(0 == stat ) {
|
|
return(ret);
|
|
}
|
|
/* determine EXPIRED vs FREERUN vs RUNNING */
|
|
else if(WD_S_EXPIRED & stat) {
|
|
ret = WD_EXPIRED;
|
|
}
|
|
else if(WD_S_RUNNING & stat) {
|
|
if(intr & pTimer->intr_mask) {
|
|
ret = WD_FREERUN;
|
|
}
|
|
else {
|
|
/* Fudge WD_EXPIRED status for defective CP1400--
|
|
* IF timer is running
|
|
* AND brokenstop is set
|
|
* AND an interrupt has been serviced
|
|
* we are WD_EXPIRED.
|
|
*
|
|
* IF timer is running
|
|
* AND brokenstop is set
|
|
* AND no interrupt has been serviced
|
|
* we are WD_FREERUN.
|
|
*/
|
|
if(wd_dev.isbaddoggie && (pTimer->runstatus & WD_STAT_BSTOP)) {
|
|
if(pTimer->runstatus & WD_STAT_SVCD) {
|
|
ret = WD_EXPIRED;
|
|
}
|
|
else {
|
|
/* we could as well pretend we are expired */
|
|
ret = WD_FREERUN;
|
|
}
|
|
}
|
|
else {
|
|
ret = WD_RUNNING;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* determine SERVICED */
|
|
if(pTimer->runstatus & WD_STAT_SVCD) {
|
|
ret |= WD_SERVICED;
|
|
}
|
|
|
|
return(ret);
|
|
}
|
|
|
|
static int __init wd_init(void)
|
|
{
|
|
int id;
|
|
struct linux_ebus *ebus = NULL;
|
|
struct linux_ebus_device *edev = NULL;
|
|
|
|
for_each_ebus(ebus) {
|
|
for_each_ebusdev(edev, ebus) {
|
|
if (!strcmp(edev->ofdev.node->name, WD_OBPNAME))
|
|
goto ebus_done;
|
|
}
|
|
}
|
|
|
|
ebus_done:
|
|
if(!edev) {
|
|
printk("%s: unable to locate device\n", WD_OBPNAME);
|
|
return -ENODEV;
|
|
}
|
|
|
|
wd_dev.regs =
|
|
ioremap(edev->resource[0].start, 4 * WD_TIMER_REGSZ); /* ? */
|
|
|
|
if(NULL == wd_dev.regs) {
|
|
printk("%s: unable to map registers\n", WD_OBPNAME);
|
|
return(-ENODEV);
|
|
}
|
|
|
|
/* initialize device structure from OBP parameters */
|
|
wd_dev.irq = edev->irqs[0];
|
|
wd_dev.opt_enable = wd_opt_enable();
|
|
wd_dev.opt_reboot = wd_opt_reboot();
|
|
wd_dev.opt_timeout = wd_opt_timeout();
|
|
wd_dev.isbaddoggie = wd_isbroken();
|
|
|
|
/* disable all interrupts unless watchdog-enabled? == true */
|
|
if(! wd_dev.opt_enable) {
|
|
wd_toggleintr(NULL, WD_INTR_OFF);
|
|
}
|
|
|
|
/* register miscellaneous devices */
|
|
for(id = WD0_ID; id < WD_NUMDEVS; ++id) {
|
|
if(0 != wd_inittimer(id)) {
|
|
printk("%s%i: unable to initialize\n", WD_OBPNAME, id);
|
|
}
|
|
}
|
|
|
|
/* warn about possible defective PLD */
|
|
if(wd_dev.isbaddoggie) {
|
|
init_timer(&wd_timer);
|
|
wd_timer.function = wd_brokentimer;
|
|
wd_timer.data = (unsigned long)&wd_dev;
|
|
wd_timer.expires = WD_BTIMEOUT;
|
|
|
|
printk("%s: PLD defect workaround enabled for model %s\n",
|
|
WD_OBPNAME, WD_BADMODEL);
|
|
}
|
|
return(0);
|
|
}
|
|
|
|
static void __exit wd_cleanup(void)
|
|
{
|
|
int id;
|
|
|
|
/* if 'watchdog-enable?' == TRUE, timers are not stopped
|
|
* when module is unloaded. All brokenstopped timers will
|
|
* also now eventually trip.
|
|
*/
|
|
for(id = WD0_ID; id < WD_NUMDEVS; ++id) {
|
|
if(WD_S_RUNNING == wd_readb(wd_dev.watchdog[id].regs + WD_STATUS)) {
|
|
if(wd_dev.opt_enable) {
|
|
printk(KERN_WARNING "%s%i: timer not stopped at release\n",
|
|
WD_OBPNAME, id);
|
|
}
|
|
else {
|
|
wd_stoptimer(&wd_dev.watchdog[id]);
|
|
if(wd_dev.watchdog[id].runstatus & WD_STAT_BSTOP) {
|
|
wd_resetbrokentimer(&wd_dev.watchdog[id]);
|
|
printk(KERN_WARNING
|
|
"%s%i: defect workaround disabled at release, "\
|
|
"timer expires in ~%01i sec\n",
|
|
WD_OBPNAME, id,
|
|
wd_readw(wd_dev.watchdog[id].regs + WD_LIMIT) / 10);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
if(wd_dev.isbaddoggie && timer_pending(&wd_timer)) {
|
|
del_timer(&wd_timer);
|
|
}
|
|
if(0 != (wd_dev.watchdog[WD0_ID].runstatus & WD_STAT_INIT)) {
|
|
misc_deregister(&wd0_miscdev);
|
|
}
|
|
if(0 != (wd_dev.watchdog[WD1_ID].runstatus & WD_STAT_INIT)) {
|
|
misc_deregister(&wd1_miscdev);
|
|
}
|
|
if(0 != (wd_dev.watchdog[WD2_ID].runstatus & WD_STAT_INIT)) {
|
|
misc_deregister(&wd2_miscdev);
|
|
}
|
|
if(0 != wd_dev.initialized) {
|
|
free_irq(wd_dev.irq, (void *)wd_dev.regs);
|
|
}
|
|
iounmap(wd_dev.regs);
|
|
}
|
|
|
|
module_init(wd_init);
|
|
module_exit(wd_cleanup);
|