a09e64fbc0
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
/* arch/arm/mach-s3c2410/include/mach/system-reset.h
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*
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* Copyright (c) 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2410 - System define for arch_reset() function
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <mach/hardware.h>
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#include <asm/io.h>
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#include <asm/plat-s3c/regs-watchdog.h>
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#include <mach/regs-clock.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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extern void (*s3c24xx_reset_hook)(void);
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static void
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arch_reset(char mode)
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{
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struct clk *wdtclk;
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if (mode == 's') {
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cpu_reset(0);
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}
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if (s3c24xx_reset_hook)
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s3c24xx_reset_hook();
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printk("arch_reset: attempting watchdog reset\n");
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__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
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wdtclk = clk_get(NULL, "watchdog");
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if (!IS_ERR(wdtclk)) {
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clk_enable(wdtclk);
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} else
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printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
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/* put initial values into count and data */
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__raw_writel(0x80, S3C2410_WTCNT);
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__raw_writel(0x80, S3C2410_WTDAT);
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/* set the watchdog to go and reset... */
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__raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
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S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
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/* wait for reset to assert... */
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mdelay(500);
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printk(KERN_ERR "Watchdog reset failed to assert reset\n");
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/* delay to allow the serial port to show the message */
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mdelay(50);
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/* we'll take a jump through zero as a poor second */
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cpu_reset(0);
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}
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