8d3d50bf19
During a EEH recover, the pci_dev structure can be null, mainly if an eeh event is detected during cpi config operation. In this case, the pci_dev will not be known (and will be null) the kernel will crash with the following message: Unable to handle kernel paging request for data at address 0x000000a0 Faulting instruction address: 0xc00000000006b8b4 Oops: Kernel access of bad area, sig: 11 [#1] NIP [c00000000006b8b4] .eeh_event_handler+0x10c/0x1a0 LR [c00000000006b8a8] .eeh_event_handler+0x100/0x1a0 Call Trace: [c0000003a80dff00] [c00000000006b8a8] .eeh_event_handler+0x100/0x1a0 [c0000003a80dff90] [c000000000031f1c] .kernel_thread+0x54/0x70 The bug occurs because pci_name() tries to access a null pointer. This patch just guarantee that pci_name() is not called on Null pointers. Signed-off-by: Breno Leitao <leitao@linux.vnet.ibm.com> Signed-off-by: Linas Vepstas <linasvepstas@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
154 lines
4.6 KiB
C
154 lines
4.6 KiB
C
/*
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* c 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_PPC_PCI_H
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#define _ASM_POWERPC_PPC_PCI_H
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#ifdef __KERNEL__
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#ifdef CONFIG_PCI
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#include <linux/pci.h>
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#include <asm/pci-bridge.h>
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extern unsigned long isa_io_base;
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extern void pci_setup_phb_io(struct pci_controller *hose, int primary);
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extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary);
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extern struct list_head hose_list;
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extern void find_and_init_phbs(void);
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extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */
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/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
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#define BUID_HI(buid) ((buid) >> 32)
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#define BUID_LO(buid) ((buid) & 0xffffffff)
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/* PCI device_node operations */
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struct device_node;
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typedef void *(*traverse_func)(struct device_node *me, void *data);
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void *traverse_pci_devices(struct device_node *start, traverse_func pre,
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void *data);
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extern void pci_devs_phb_init(void);
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extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
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/* From rtas_pci.h */
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extern void init_pci_config_tokens (void);
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extern unsigned long get_phb_buid (struct device_node *);
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extern int rtas_setup_phb(struct pci_controller *phb);
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extern unsigned long pci_probe_only;
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/* ---- EEH internal-use-only related routines ---- */
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#ifdef CONFIG_EEH
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void pci_addr_cache_insert_device(struct pci_dev *dev);
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void pci_addr_cache_remove_device(struct pci_dev *dev);
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void pci_addr_cache_build(void);
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struct pci_dev *pci_get_device_by_addr(unsigned long addr);
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/**
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* eeh_slot_error_detail -- record and EEH error condition to the log
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* @pdn: pci device node
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* @severity: EEH_LOG_TEMP_FAILURE or EEH_LOG_PERM_FAILURE
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*
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* Obtains the EEH error details from the RTAS subsystem,
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* and then logs these details with the RTAS error log system.
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*/
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#define EEH_LOG_TEMP_FAILURE 1
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#define EEH_LOG_PERM_FAILURE 2
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void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
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/**
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* rtas_pci_enable - enable IO transfers for this slot
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* @pdn: pci device node
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* @function: either EEH_THAW_MMIO or EEH_THAW_DMA
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*
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* Enable I/O transfers to this slot
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*/
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#define EEH_THAW_MMIO 2
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#define EEH_THAW_DMA 3
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int rtas_pci_enable(struct pci_dn *pdn, int function);
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/**
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* rtas_set_slot_reset -- unfreeze a frozen slot
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* @pdn: pci device node
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*
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* Clear the EEH-frozen condition on a slot. This routine
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* does this by asserting the PCI #RST line for 1/8th of
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* a second; this routine will sleep while the adapter is
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* being reset.
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*
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* Returns a non-zero value if the reset failed.
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*/
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int rtas_set_slot_reset (struct pci_dn *);
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int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
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/**
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* eeh_restore_bars - Restore device configuration info.
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* @pdn: pci device node
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*
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* A reset of a PCI device will clear out its config space.
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* This routines will restore the config space for this
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* device, and is children, to values previously obtained
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* from the firmware.
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*/
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void eeh_restore_bars(struct pci_dn *);
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/**
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* rtas_configure_bridge -- firmware initialization of pci bridge
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* @pdn: pci device node
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*
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* Ask the firmware to configure all PCI bridges devices
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* located behind the indicated node. Required after a
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* pci device reset. Does essentially the same hing as
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* eeh_restore_bars, but for brdges, and lets firmware
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* do the work.
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*/
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void rtas_configure_bridge(struct pci_dn *);
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int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
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int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
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/**
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* eeh_mark_slot -- set mode flags for pertition endpoint
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* @pdn: pci device node
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*
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* mark and clear slots: find "partition endpoint" PE and set or
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* clear the flags for each subnode of the PE.
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*/
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void eeh_mark_slot (struct device_node *dn, int mode_flag);
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void eeh_clear_slot (struct device_node *dn, int mode_flag);
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/**
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* find_device_pe -- Find the associated "Partiationable Endpoint" PE
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* @pdn: pci device node
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*/
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struct device_node * find_device_pe(struct device_node *dn);
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void eeh_sysfs_add_device(struct pci_dev *pdev);
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void eeh_sysfs_remove_device(struct pci_dev *pdev);
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static inline const char *eeh_pci_name(struct pci_dev *pdev)
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{
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return pdev ? pci_name(pdev) : "<null>";
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}
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#endif /* CONFIG_EEH */
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#else /* CONFIG_PCI */
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static inline void find_and_init_phbs(void) { }
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static inline void init_pci_config_tokens(void) { }
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#endif /* !CONFIG_PCI */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PPC_PCI_H */
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