c20351846e
This follows the ARM change from Aaro Koskinen: When unmapping N pages (e.g. shared memory) the amount of TLB flushes done can be (N*PAGE_SIZE/ZAP_BLOCK_SIZE)*N although it should be N at maximum. With PREEMPT kernel ZAP_BLOCK_SIZE is 8 pages, so there is a noticeable performance penalty when unmapping a large VMA and the system is spending its time in flush_tlb_range(). The problem is that tlb_end_vma() is always flushing the full VMA range. The subrange that needs to be flushed can be calculated by tlb_remove_tlb_entry(). This approach was suggested by Hugh Dickins, and is also used by other arches. The speed increase is roughly 3x for 8M mappings and for larger mappings even more. Bits and peices are taken from the ARM patch as well as the existing arch/um implementation that is quite similar. The end result is a significant reduction in both partial and full TLB flushes initiated through flush_tlb_range(). At the same time, the nommu implementation was broken, had a superfluous cache flush, and subsequently would have triggered a BUG_ON() if a code-path had triggered it. Tidy this up for correctness and provide a nopped-out implementation there. More background on the initial discussion can be found at: http://marc.info/?t=123609820900002&r=1&w=2 http://marc.info/?t=123660375800003&r=1&w=2 Signed-off-by: Paul Mundt <lethal@linux-sh.org>
112 lines
2.5 KiB
C
112 lines
2.5 KiB
C
#ifndef __ASM_SH_TLB_H
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#define __ASM_SH_TLB_H
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#ifdef CONFIG_SUPERH64
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# include "tlb_64.h"
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#endif
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#ifndef __ASSEMBLY__
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#include <linux/pagemap.h>
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#ifdef CONFIG_MMU
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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/*
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* TLB handling. This allows us to remove pages from the page
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* tables, and efficiently handle the TLB issues.
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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unsigned int fullmm;
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unsigned long start, end;
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};
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DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
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static inline void init_tlb_gather(struct mmu_gather *tlb)
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{
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tlb->start = TASK_SIZE;
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tlb->end = 0;
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if (tlb->fullmm) {
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tlb->start = 0;
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tlb->end = TASK_SIZE;
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}
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}
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static inline struct mmu_gather *
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tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
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{
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struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
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tlb->mm = mm;
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tlb->fullmm = full_mm_flush;
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init_tlb_gather(tlb);
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return tlb;
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}
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static inline void
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tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
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{
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if (tlb->fullmm)
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flush_tlb_mm(tlb->mm);
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/* keep the page table cache within bounds */
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check_pgt_cache();
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put_cpu_var(mmu_gathers);
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}
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static inline void
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tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
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{
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if (tlb->start > address)
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tlb->start = address;
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if (tlb->end < address + PAGE_SIZE)
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tlb->end = address + PAGE_SIZE;
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}
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/*
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* In the case of tlb vma handling, we can optimise these away in the
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* case where we're doing a full MM flush. When we're doing a munmap,
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* the vmas are adjusted to only cover the region to be torn down.
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*/
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static inline void
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tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
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{
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if (!tlb->fullmm)
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flush_cache_range(vma, vma->vm_start, vma->vm_end);
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}
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static inline void
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tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
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{
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if (!tlb->fullmm && tlb->end) {
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flush_tlb_range(vma, tlb->start, tlb->end);
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init_tlb_gather(tlb);
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}
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}
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#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page)
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#define pte_free_tlb(tlb, ptep) pte_free((tlb)->mm, ptep)
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#define pmd_free_tlb(tlb, pmdp) pmd_free((tlb)->mm, pmdp)
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#define pud_free_tlb(tlb, pudp) pud_free((tlb)->mm, pudp)
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#define tlb_migrate_finish(mm) do { } while (0)
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#else /* CONFIG_MMU */
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#define tlb_end_vma(tlb, vma) do { } while (0)
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#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
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#define tlb_flush(tlb) do { } while (0)
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#include <asm-generic/tlb.h>
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#endif /* CONFIG_MMU */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_SH_TLB_H */
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