Andrew Victor 32b1216d1e [ARM] 4913/1: [AT91] PMC_MDIV definitions ... The allowed values for the MDIV field (Master Clock Division) in the PMC controller differ between the AT91RM9200 and AT91SAM9/CAP9. To remove possible confusion, change the definitions to be more explicit. Also define the Processor Clock Division bits. Signed-off-by: Andrew Victor <linux@maxim.org.za> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>		2008-04-10 14:57:20 +01:00
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at91_adc.h
at91_aic.h
at91_dbgu.h
at91_ecc.h	[ARM] 4904/1: [AT91] Pass ECC controller to NAND driver	2008-04-04 09:52:20 +01:00
at91_mci.h	[ARM] 4802/1: Fix typo and remove vague comment	2008-02-04 13:16:39 +00:00
at91_pio.h
at91_pit.h
at91_pmc.h	[ARM] 4913/1: [AT91] PMC_MDIV definitions	2008-04-10 14:57:20 +01:00
at91_rstc.h
at91_rtc.h
at91_rtt.h
at91_shdwc.h	[ARM] 4907/1: [AT91] SAM9/CAP9 reset reason	2008-04-04 09:52:23 +01:00
at91_spi.h
at91_ssc.h
at91_st.h
at91_tc.h
at91_twi.h
at91_wdt.h
at91cap9_ddrsdr.h	[ARM] 4902/1: [AT91] SAM9/CAP9 memory controller header	2008-04-04 09:52:18 +01:00
at91cap9_matrix.h
at91cap9.h	[ARM] 4863/1: AT91: CAP9 USART definitions for early debug	2008-03-20 15:59:30 +00:00
at91rm9200_emac.h
at91rm9200_mc.h
at91rm9200.h
at91sam9_sdramc.h	[ARM] 4902/1: [AT91] SAM9/CAP9 memory controller header	2008-04-04 09:52:18 +01:00
at91sam9_smc.h	[ARM] 4902/1: [AT91] SAM9/CAP9 memory controller header	2008-04-04 09:52:18 +01:00
at91sam9rl_matrix.h
at91sam9rl.h
at91sam9260_matrix.h
at91sam9260.h
at91sam9261_matrix.h
at91sam9261.h
at91sam9263_matrix.h
at91sam9263.h
at91x40.h
board.h
cpu.h
debug-macro.S
dma.h
entry-macro.S
gpio.h
hardware.h
io.h
irqs.h
memory.h
system.h
timex.h
uncompress.h
vmalloc.h