bfd4e0709f
Patch from Ben Dooks Fix the setting of hdiv when set to divide-by-2. Thanks to Jeonghoon Yoon for pointing this out. Change name of the NAND device to "s3c2440-nand" as it is not similar enough to the "s3c2410-nand" device. Signed-off-by: Ben Dooks Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
284 lines
6.4 KiB
C
284 lines
6.4 KiB
C
/* linux/arch/arm/mach-s3c2410/s3c2440.c
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*
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* Copyright (c) 2004-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Samsung S3C2440 Mobile CPU support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Modifications:
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* 24-Aug-2004 BJD Start of s3c2440 support
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* 12-Oct-2004 BJD Moved clock info out to clock.c
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* 01-Nov-2004 BJD Fixed clock build code
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* 09-Nov-2004 BJD Added sysdev for power management
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* 04-Nov-2004 BJD New serial registration
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* 15-Nov-2004 BJD Rename the i2c device for the s3c2440
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* 14-Jan-2005 BJD Moved clock init code into seperate function
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* 14-Jan-2005 BJD Removed un-used clock bits
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/sysdev.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hardware/clock.h>
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#include <asm/arch/regs-clock.h>
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#include <asm/arch/regs-serial.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-gpioj.h>
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#include <asm/arch/regs-dsc.h>
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#include "s3c2440.h"
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#include "clock.h"
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#include "devs.h"
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#include "cpu.h"
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#include "pm.h"
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static struct map_desc s3c2440_iodesc[] __initdata = {
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IODESC_ENT(USBHOST),
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IODESC_ENT(CLKPWR),
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IODESC_ENT(LCD),
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IODESC_ENT(TIMER),
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IODESC_ENT(ADC),
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IODESC_ENT(WATCHDOG),
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};
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static struct resource s3c_uart0_resource[] = {
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[0] = {
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.start = S3C2410_PA_UART0,
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.end = S3C2410_PA_UART0 + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_S3CUART_RX0,
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.end = IRQ_S3CUART_ERR0,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct resource s3c_uart1_resource[] = {
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[0] = {
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.start = S3C2410_PA_UART1,
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.end = S3C2410_PA_UART1 + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_S3CUART_RX1,
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.end = IRQ_S3CUART_ERR1,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct resource s3c_uart2_resource[] = {
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[0] = {
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.start = S3C2410_PA_UART2,
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.end = S3C2410_PA_UART2 + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_S3CUART_RX2,
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.end = IRQ_S3CUART_ERR2,
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.flags = IORESOURCE_IRQ,
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}
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};
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/* our uart devices */
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static struct platform_device s3c_uart0 = {
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.name = "s3c2440-uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(s3c_uart0_resource),
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.resource = s3c_uart0_resource,
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};
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static struct platform_device s3c_uart1 = {
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.name = "s3c2440-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(s3c_uart1_resource),
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.resource = s3c_uart1_resource,
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};
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static struct platform_device s3c_uart2 = {
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.name = "s3c2440-uart",
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.id = 2,
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.num_resources = ARRAY_SIZE(s3c_uart2_resource),
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.resource = s3c_uart2_resource,
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};
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static struct platform_device *uart_devices[] __initdata = {
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&s3c_uart0,
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&s3c_uart1,
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&s3c_uart2
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};
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/* uart initialisation */
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static int __initdata s3c2440_uart_count;
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void __init s3c2440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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struct platform_device *platdev;
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int uart;
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for (uart = 0; uart < no; uart++, cfg++) {
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platdev = uart_devices[cfg->hwport];
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s3c24xx_uart_devs[uart] = platdev;
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platdev->dev.platform_data = cfg;
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}
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s3c2440_uart_count = uart;
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}
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#ifdef CONFIG_PM
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struct sleep_save s3c2440_sleep[] = {
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SAVE_ITEM(S3C2440_DSC0),
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SAVE_ITEM(S3C2440_DSC1),
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SAVE_ITEM(S3C2440_GPJDAT),
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SAVE_ITEM(S3C2440_GPJCON),
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SAVE_ITEM(S3C2440_GPJUP)
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};
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static int s3c2440_suspend(struct sys_device *dev, pm_message_t state)
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{
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s3c2410_pm_do_save(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
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return 0;
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}
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static int s3c2440_resume(struct sys_device *dev)
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{
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s3c2410_pm_do_restore(s3c2440_sleep, ARRAY_SIZE(s3c2440_sleep));
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return 0;
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}
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#else
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#define s3c2440_suspend NULL
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#define s3c2440_resume NULL
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#endif
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struct sysdev_class s3c2440_sysclass = {
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set_kset_name("s3c2440-core"),
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.suspend = s3c2440_suspend,
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.resume = s3c2440_resume
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};
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static struct sys_device s3c2440_sysdev = {
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.cls = &s3c2440_sysclass,
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};
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void __init s3c2440_map_io(struct map_desc *mach_desc, int size)
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{
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/* register our io-tables */
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iotable_init(s3c2440_iodesc, ARRAY_SIZE(s3c2440_iodesc));
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iotable_init(mach_desc, size);
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/* rename any peripherals used differing from the s3c2410 */
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s3c_device_i2c.name = "s3c2440-i2c";
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s3c_device_nand.name = "s3c2440-nand";
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/* change irq for watchdog */
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s3c_device_wdt.resource[1].start = IRQ_S3C2440_WDT;
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s3c_device_wdt.resource[1].end = IRQ_S3C2440_WDT;
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}
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void __init s3c2440_init_clocks(int xtal)
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{
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unsigned long clkdiv;
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unsigned long camdiv;
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unsigned long hclk, fclk, pclk;
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int hdiv = 1;
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/* now we've got our machine bits initialised, work out what
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* clocks we've got */
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fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
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clkdiv = __raw_readl(S3C2410_CLKDIVN);
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camdiv = __raw_readl(S3C2440_CAMDIVN);
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/* work out clock scalings */
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switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
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case S3C2440_CLKDIVN_HDIVN_1:
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hdiv = 1;
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break;
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case S3C2440_CLKDIVN_HDIVN_2:
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hdiv = 2;
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break;
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case S3C2440_CLKDIVN_HDIVN_4_8:
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hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
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break;
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case S3C2440_CLKDIVN_HDIVN_3_6:
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hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
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break;
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}
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hclk = fclk / hdiv;
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pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
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/* print brief summary of clocks, etc */
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printk("S3C2440: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
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print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
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/* initialise the clocks here, to allow other things like the
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* console to use them, and to add new ones after the initialisation
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*/
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s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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}
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/* need to register class before we actually register the device, and
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* we also need to ensure that it has been initialised before any of the
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* drivers even try to use it (even if not on an s3c2440 based system)
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* as a driver which may support both 2410 and 2440 may try and use it.
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*/
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int __init s3c2440_core_init(void)
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{
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return sysdev_class_register(&s3c2440_sysclass);
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}
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core_initcall(s3c2440_core_init);
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int __init s3c2440_init(void)
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{
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int ret;
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printk("S3C2440: Initialising architecture\n");
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ret = sysdev_register(&s3c2440_sysdev);
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if (ret != 0)
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printk(KERN_ERR "failed to register sysdev for s3c2440\n");
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else
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ret = platform_add_devices(s3c24xx_uart_devs, s3c2440_uart_count);
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return ret;
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}
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