Zachary Amsden 7c4cb60e5b [PATCH] x86: GDT alignment fix ... Make GDT page aligned and page padded to support running inside of a hypervisor. This prevents false sharing of the GDT page with other hot data, which is not allowed in Xen, and causes performance problems in VMware. Rather than go back to the old method of statically allocating the GDT (which wastes unneded space for non-present CPUs), the GDT for APs is allocated dynamically. Signed-off-by: Zachary Amsden <zach@vmware.com> Cc: "Seth, Rohit" <rohit.seth@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>		2006-01-06 08:33:33 -08:00
..
cpufreq	[CPUFREQ] Move PMBASE reading away and do it only once at initialization time	2005-12-06 19:27:15 -08:00
mcheck	[PATCH] x86: add MCE resume	2005-11-07 07:53:30 -08:00
mtrr	[PATCH] x86_64: Force correct address space size for MTRR on some 64bit Intel Xeons	2005-11-14 19:55:16 -08:00
amd.c	[PATCH] x86-64/i386: Intel HT, Multi core detection fixes	2005-11-14 19:55:16 -08:00
centaur.c
changelog
common.c	[PATCH] x86: GDT alignment fix	2006-01-06 08:33:33 -08:00
cpu.h
cyrix.c	[PATCH] i386: inline asm cleanup	2005-09-05 00:06:11 -07:00
intel_cacheinfo.c	[PATCH] x86_64: x86_64/i386 fix Intel cache detection code assumption about threads sharing	2005-11-14 19:55:16 -08:00
intel.c	Merge x86-64 update from Andi	2005-11-14 19:56:02 -08:00
Makefile
nexgen.c
proc.c	[CPUFREQ] CPU frequency display in /proc/cpuinfo	2005-12-06 19:35:11 -08:00
rise.c
transmeta.c	[PATCH] transmeta: CONFIG_PROC_FS=n build fix	2005-08-01 21:38:00 -07:00
umc.c