3f7e5815f4
Split the iop3xx mach type into iop32x and iop33x -- split the config symbols, and move the code in the mach-iop3xx directory to the mach-iop32x and mach-iop33x directories. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
131 lines
4.2 KiB
C
131 lines
4.2 KiB
C
/*
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* linux/include/asm-arm/arch-iop33x/irqs.h
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*
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* Author: Dave Jiang (dave.jiang@intel.com)
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* Copyright: (C) 2003 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef _IRQS_H_
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#define _IRQS_H_
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/*
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* IOP80331 chipset interrupts
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*/
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#define IOP331_IRQ_OFS 0
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#define IOP331_IRQ(x) (IOP331_IRQ_OFS + (x))
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/*
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* On IRQ or FIQ register
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*/
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#define IRQ_IOP331_DMA0_EOT IOP331_IRQ(0)
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#define IRQ_IOP331_DMA0_EOC IOP331_IRQ(1)
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#define IRQ_IOP331_DMA1_EOT IOP331_IRQ(2)
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#define IRQ_IOP331_DMA1_EOC IOP331_IRQ(3)
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#define IRQ_IOP331_RSVD_4 IOP331_IRQ(4)
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#define IRQ_IOP331_RSVD_5 IOP331_IRQ(5)
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#define IRQ_IOP331_AA_EOT IOP331_IRQ(6)
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#define IRQ_IOP331_AA_EOC IOP331_IRQ(7)
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#define IRQ_IOP331_TIMER0 IOP331_IRQ(8)
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#define IRQ_IOP331_TIMER1 IOP331_IRQ(9)
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#define IRQ_IOP331_I2C_0 IOP331_IRQ(10)
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#define IRQ_IOP331_I2C_1 IOP331_IRQ(11)
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#define IRQ_IOP331_MSG IOP331_IRQ(12)
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#define IRQ_IOP331_MSGIBQ IOP331_IRQ(13)
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#define IRQ_IOP331_ATU_BIST IOP331_IRQ(14)
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#define IRQ_IOP331_PERFMON IOP331_IRQ(15)
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#define IRQ_IOP331_CORE_PMU IOP331_IRQ(16)
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#define IRQ_IOP331_RSVD_17 IOP331_IRQ(17)
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#define IRQ_IOP331_RSVD_18 IOP331_IRQ(18)
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#define IRQ_IOP331_RSVD_19 IOP331_IRQ(19)
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#define IRQ_IOP331_RSVD_20 IOP331_IRQ(20)
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#define IRQ_IOP331_RSVD_21 IOP331_IRQ(21)
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#define IRQ_IOP331_RSVD_22 IOP331_IRQ(22)
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#define IRQ_IOP331_RSVD_23 IOP331_IRQ(23)
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#define IRQ_IOP331_XINT0 IOP331_IRQ(24)
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#define IRQ_IOP331_XINT1 IOP331_IRQ(25)
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#define IRQ_IOP331_XINT2 IOP331_IRQ(26)
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#define IRQ_IOP331_XINT3 IOP331_IRQ(27)
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#define IRQ_IOP331_RSVD_28 IOP331_IRQ(28)
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#define IRQ_IOP331_RSVD_29 IOP331_IRQ(29)
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#define IRQ_IOP331_RSVD_30 IOP331_IRQ(30)
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#define IRQ_IOP331_RSVD_31 IOP331_IRQ(31)
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#define IRQ_IOP331_XINT8 IOP331_IRQ(32) // 0
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#define IRQ_IOP331_XINT9 IOP331_IRQ(33) // 1
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#define IRQ_IOP331_XINT10 IOP331_IRQ(34) // 2
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#define IRQ_IOP331_XINT11 IOP331_IRQ(35) // 3
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#define IRQ_IOP331_XINT12 IOP331_IRQ(36) // 4
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#define IRQ_IOP331_XINT13 IOP331_IRQ(37) // 5
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#define IRQ_IOP331_XINT14 IOP331_IRQ(38) // 6
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#define IRQ_IOP331_XINT15 IOP331_IRQ(39) // 7
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#define IRQ_IOP331_RSVD_40 IOP331_IRQ(40) // 8
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#define IRQ_IOP331_RSVD_41 IOP331_IRQ(41) // 9
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#define IRQ_IOP331_RSVD_42 IOP331_IRQ(42) // 10
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#define IRQ_IOP331_RSVD_43 IOP331_IRQ(43) // 11
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#define IRQ_IOP331_RSVD_44 IOP331_IRQ(44) // 12
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#define IRQ_IOP331_RSVD_45 IOP331_IRQ(45) // 13
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#define IRQ_IOP331_RSVD_46 IOP331_IRQ(46) // 14
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#define IRQ_IOP331_RSVD_47 IOP331_IRQ(47) // 15
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#define IRQ_IOP331_RSVD_48 IOP331_IRQ(48) // 16
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#define IRQ_IOP331_RSVD_49 IOP331_IRQ(49) // 17
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#define IRQ_IOP331_RSVD_50 IOP331_IRQ(50) // 18
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#define IRQ_IOP331_UART0 IOP331_IRQ(51) // 19
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#define IRQ_IOP331_UART1 IOP331_IRQ(52) // 20
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#define IRQ_IOP331_PBIE IOP331_IRQ(53) // 21
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#define IRQ_IOP331_ATU_CRW IOP331_IRQ(54) // 22
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#define IRQ_IOP331_ATU_ERR IOP331_IRQ(55) // 23
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#define IRQ_IOP331_MCU_ERR IOP331_IRQ(56) // 24
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#define IRQ_IOP331_DMA0_ERR IOP331_IRQ(57) // 25
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#define IRQ_IOP331_DMA1_ERR IOP331_IRQ(58) // 26
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#define IRQ_IOP331_RSVD_59 IOP331_IRQ(59) // 27
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#define IRQ_IOP331_AA_ERR IOP331_IRQ(60) // 28
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#define IRQ_IOP331_RSVD_61 IOP331_IRQ(61) // 29
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#define IRQ_IOP331_MSG_ERR IOP331_IRQ(62) // 30
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#define IRQ_IOP331_HPI IOP331_IRQ(63) // 31
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#define NR_IRQS (IOP331_IRQ(63) + 1)
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/*
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* Interrupts available on the IQ80331 board
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*/
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/*
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* On board devices
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*/
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#define IRQ_IQ80331_I82544 IRQ_IOP331_XINT0
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#define IRQ_IQ80331_UART0 IRQ_IOP331_UART0
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#define IRQ_IQ80331_UART1 IRQ_IOP331_UART1
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/*
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* PCI interrupts
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*/
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#define IRQ_IQ80331_INTA IRQ_IOP331_XINT0
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#define IRQ_IQ80331_INTB IRQ_IOP331_XINT1
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#define IRQ_IQ80331_INTC IRQ_IOP331_XINT2
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#define IRQ_IQ80331_INTD IRQ_IOP331_XINT3
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/*
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* Interrupts available on the IQ80332 board
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*/
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/*
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* On board devices
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*/
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#define IRQ_IQ80332_I82544 IRQ_IOP331_XINT0
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#define IRQ_IQ80332_UART0 IRQ_IOP331_UART0
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#define IRQ_IQ80332_UART1 IRQ_IOP331_UART1
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/*
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* PCI interrupts
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*/
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#define IRQ_IQ80332_INTA IRQ_IOP331_XINT0
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#define IRQ_IQ80332_INTB IRQ_IOP331_XINT1
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#define IRQ_IQ80332_INTC IRQ_IOP331_XINT2
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#define IRQ_IQ80332_INTD IRQ_IOP331_XINT3
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#endif // _IRQ_H_
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