7f6fc83bc9
Enable and vote RX and TX supplies dynamically during respective usecases. Change-Id: I671c14b34ce0325e102d94083905329d473d4a78 Signed-off-by: Mangesh Kunchamwar <mangeshk@codeaurora.org> Signed-off-by: Surendar Karka <skarka@codeaurora.org>
554 lines
14 KiB
C
554 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2011-2019, The Linux Foundation. All rights reserved.
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*/
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#ifndef __MFD_TABLA_CORE_H__
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#define __MFD_TABLA_CORE_H__
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#include <linux/types.h>
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#include <linux/platform_device.h>
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#include <linux/of_irq.h>
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#include <linux/interrupt.h>
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#include <linux/pm_qos.h>
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#include "pdata.h"
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#define WCD9XXX_MAX_IRQ_REGS 4
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#define WCD9XXX_MAX_NUM_IRQS (WCD9XXX_MAX_IRQ_REGS * 8)
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#define WCD9XXX_SLIM_NUM_PORT_REG 3
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#define TABLA_VERSION_1_0 0
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#define TABLA_VERSION_1_1 1
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#define TABLA_VERSION_2_0 2
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#define TABLA_IS_1_X(ver) \
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(((ver == TABLA_VERSION_1_0) || (ver == TABLA_VERSION_1_1)) ? 1 : 0)
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#define TABLA_IS_2_0(ver) ((ver == TABLA_VERSION_2_0) ? 1 : 0)
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#define WCD9XXX_SUPPLY_BUCK_NAME "cdc-vdd-buck"
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#define SITAR_VERSION_1P0 0
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#define SITAR_VERSION_1P1 1
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#define SITAR_IS_1P0(ver) \
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((ver == SITAR_VERSION_1P0) ? 1 : 0)
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#define SITAR_IS_1P1(ver) \
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((ver == SITAR_VERSION_1P1) ? 1 : 0)
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#define TAIKO_VERSION_1_0 1
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#define TAIKO_IS_1_0(ver) \
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((ver == TAIKO_VERSION_1_0) ? 1 : 0)
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#define TAPAN_VERSION_1_0 0
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#define TAPAN_IS_1_0(ver) \
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((ver == TAPAN_VERSION_1_0) ? 1 : 0)
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#define TOMTOM_VERSION_1_0 1
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#define TOMTOM_IS_1_0(ver) \
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((ver == TOMTOM_VERSION_1_0) ? 1 : 0)
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#define TASHA_VERSION_1_0 0
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#define TASHA_VERSION_1_1 1
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#define TASHA_VERSION_2_0 2
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#define TASHA_IS_1_0(wcd) \
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((wcd->type == WCD9335 || wcd->type == WCD9326) ? \
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((wcd->version == TASHA_VERSION_1_0) ? 1 : 0) : 0)
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#define TASHA_IS_1_1(wcd) \
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((wcd->type == WCD9335 || wcd->type == WCD9326) ? \
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((wcd->version == TASHA_VERSION_1_1) ? 1 : 0) : 0)
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#define TASHA_IS_2_0(wcd) \
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((wcd->type == WCD9335 || wcd->type == WCD9326) ? \
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((wcd->version == TASHA_VERSION_2_0) ? 1 : 0) : 0)
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/*
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* As fine version info cannot be retrieved before tavil probe.
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* Define three coarse versions for possible future use before tavil probe.
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*/
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#define TAVIL_VERSION_1_0 0
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#define TAVIL_VERSION_1_1 1
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#define TAVIL_VERSION_WCD9340_1_0 2
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#define TAVIL_VERSION_WCD9341_1_0 3
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#define TAVIL_VERSION_WCD9340_1_1 4
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#define TAVIL_VERSION_WCD9341_1_1 5
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#define TAVIL_IS_1_0(wcd) \
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((wcd->type == WCD934X) ? \
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((wcd->version == TAVIL_VERSION_1_0 || \
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wcd->version == TAVIL_VERSION_WCD9340_1_0 || \
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wcd->version == TAVIL_VERSION_WCD9341_1_0) ? 1 : 0) : 0)
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#define TAVIL_IS_1_1(wcd) \
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((wcd->type == WCD934X) ? \
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((wcd->version == TAVIL_VERSION_1_1 || \
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wcd->version == TAVIL_VERSION_WCD9340_1_1 || \
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wcd->version == TAVIL_VERSION_WCD9341_1_1) ? 1 : 0) : 0)
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#define TAVIL_IS_WCD9340_1_0(wcd) \
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((wcd->type == WCD934X) ? \
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((wcd->version == TAVIL_VERSION_WCD9340_1_0) ? 1 : 0) : 0)
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#define TAVIL_IS_WCD9341_1_0(wcd) \
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((wcd->type == WCD934X) ? \
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((wcd->version == TAVIL_VERSION_WCD9341_1_0) ? 1 : 0) : 0)
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#define TAVIL_IS_WCD9340_1_1(wcd) \
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((wcd->type == WCD934X) ? \
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((wcd->version == TAVIL_VERSION_WCD9340_1_1) ? 1 : 0) : 0)
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#define TAVIL_IS_WCD9341_1_1(wcd) \
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((wcd->type == WCD934X) ? \
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((wcd->version == TAVIL_VERSION_WCD9341_1_1) ? 1 : 0) : 0)
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#define IS_CODEC_TYPE(wcd, wcdtype) \
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((wcd->type == wcdtype) ? true : false)
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#define IS_CODEC_VERSION(wcd, wcdversion) \
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((wcd->version == wcdversion) ? true : false)
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enum {
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CDC_V_1_0,
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CDC_V_1_1,
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CDC_V_2_0,
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};
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enum codec_variant {
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WCD9XXX,
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WCD9330,
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WCD9335,
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WCD9326,
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WCD934X,
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};
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enum wcd9xxx_slim_slave_addr_type {
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WCD9XXX_SLIM_SLAVE_ADDR_TYPE_0,
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WCD9XXX_SLIM_SLAVE_ADDR_TYPE_1,
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};
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enum wcd9xxx_pm_state {
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WCD9XXX_PM_SLEEPABLE,
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WCD9XXX_PM_AWAKE,
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WCD9XXX_PM_ASLEEP,
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};
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enum {
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WCD9XXX_INTR_STATUS_BASE = 0,
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WCD9XXX_INTR_CLEAR_BASE,
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WCD9XXX_INTR_MASK_BASE,
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WCD9XXX_INTR_LEVEL_BASE,
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WCD9XXX_INTR_CLR_COMMIT,
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WCD9XXX_INTR_REG_MAX,
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};
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enum wcd9xxx_intf_status {
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WCD9XXX_INTERFACE_TYPE_PROBING,
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WCD9XXX_INTERFACE_TYPE_SLIMBUS,
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WCD9XXX_INTERFACE_TYPE_I2C,
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};
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enum {
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/* INTR_REG 0 */
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WCD9XXX_IRQ_SLIMBUS = 0,
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WCD9XXX_IRQ_MBHC_REMOVAL,
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WCD9XXX_IRQ_MBHC_SHORT_TERM,
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WCD9XXX_IRQ_MBHC_PRESS,
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WCD9XXX_IRQ_MBHC_RELEASE,
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WCD9XXX_IRQ_MBHC_POTENTIAL,
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WCD9XXX_IRQ_MBHC_INSERTION,
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WCD9XXX_IRQ_BG_PRECHARGE,
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/* INTR_REG 1 */
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WCD9XXX_IRQ_PA1_STARTUP,
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WCD9XXX_IRQ_PA2_STARTUP,
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WCD9XXX_IRQ_PA3_STARTUP,
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WCD9XXX_IRQ_PA4_STARTUP,
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WCD9306_IRQ_HPH_PA_OCPR_FAULT = WCD9XXX_IRQ_PA4_STARTUP,
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WCD9XXX_IRQ_PA5_STARTUP,
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WCD9XXX_IRQ_MICBIAS1_PRECHARGE,
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WCD9306_IRQ_HPH_PA_OCPL_FAULT = WCD9XXX_IRQ_MICBIAS1_PRECHARGE,
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WCD9XXX_IRQ_MICBIAS2_PRECHARGE,
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WCD9XXX_IRQ_MICBIAS3_PRECHARGE,
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/* INTR_REG 2 */
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WCD9XXX_IRQ_HPH_PA_OCPL_FAULT,
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WCD9XXX_IRQ_HPH_PA_OCPR_FAULT,
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WCD9XXX_IRQ_EAR_PA_OCPL_FAULT,
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WCD9XXX_IRQ_HPH_L_PA_STARTUP,
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WCD9XXX_IRQ_HPH_R_PA_STARTUP,
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WCD9320_IRQ_EAR_PA_STARTUP,
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WCD9306_IRQ_MBHC_JACK_SWITCH = WCD9320_IRQ_EAR_PA_STARTUP,
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WCD9310_NUM_IRQS,
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WCD9XXX_IRQ_RESERVED_0 = WCD9310_NUM_IRQS,
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WCD9XXX_IRQ_RESERVED_1,
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WCD9330_IRQ_SVASS_ERR_EXCEPTION = WCD9310_NUM_IRQS,
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WCD9330_IRQ_MBHC_JACK_SWITCH,
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/* INTR_REG 3 */
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WCD9XXX_IRQ_MAD_AUDIO,
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WCD9XXX_IRQ_MAD_ULTRASOUND,
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WCD9XXX_IRQ_MAD_BEACON,
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WCD9XXX_IRQ_SPEAKER_CLIPPING,
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WCD9320_IRQ_MBHC_JACK_SWITCH,
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WCD9306_NUM_IRQS,
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WCD9XXX_IRQ_VBAT_MONITOR_ATTACK = WCD9306_NUM_IRQS,
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WCD9XXX_IRQ_VBAT_MONITOR_RELEASE,
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WCD9XXX_NUM_IRQS,
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/* WCD9330 INTR1_REG 3*/
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WCD9330_IRQ_SVASS_ENGINE = WCD9XXX_IRQ_MAD_AUDIO,
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WCD9330_IRQ_MAD_AUDIO,
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WCD9330_IRQ_MAD_ULTRASOUND,
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WCD9330_IRQ_MAD_BEACON,
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WCD9330_IRQ_SPEAKER1_CLIPPING,
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WCD9330_IRQ_SPEAKER2_CLIPPING,
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WCD9330_IRQ_VBAT_MONITOR_ATTACK,
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WCD9330_IRQ_VBAT_MONITOR_RELEASE,
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WCD9330_NUM_IRQS,
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WCD9XXX_IRQ_RESERVED_2 = WCD9330_NUM_IRQS,
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};
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enum {
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TABLA_NUM_IRQS = WCD9310_NUM_IRQS,
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SITAR_NUM_IRQS = WCD9310_NUM_IRQS,
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TAIKO_NUM_IRQS = WCD9XXX_NUM_IRQS,
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TAPAN_NUM_IRQS = WCD9306_NUM_IRQS,
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TOMTOM_NUM_IRQS = WCD9330_NUM_IRQS,
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};
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struct intr_data {
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int intr_num;
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bool clear_first;
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};
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struct wcd9xxx_core_resource {
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struct mutex irq_lock;
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struct mutex nested_irq_lock;
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enum wcd9xxx_pm_state pm_state;
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struct mutex pm_lock;
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/* pm_wq notifies change of pm_state */
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wait_queue_head_t pm_wq;
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struct pm_qos_request pm_qos_req;
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int wlock_holders;
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/* holds the table of interrupts per codec */
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const struct intr_data *intr_table;
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int intr_table_size;
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unsigned int irq_base;
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unsigned int irq;
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u8 irq_masks_cur[WCD9XXX_MAX_IRQ_REGS];
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u8 irq_masks_cache[WCD9XXX_MAX_IRQ_REGS];
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bool irq_level_high[WCD9XXX_MAX_NUM_IRQS];
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int num_irqs;
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int num_irq_regs;
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u16 intr_reg[WCD9XXX_INTR_REG_MAX];
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struct regmap *wcd_core_regmap;
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/* Pointer to parent container data structure */
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void *parent;
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struct device *dev;
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struct irq_domain *domain;
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};
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/*
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* data structure for Slimbus and I2S channel.
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* Some of fields are only used in smilbus mode
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*/
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struct wcd9xxx_ch {
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u32 sph; /* share channel handle - slimbus only */
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u32 ch_num; /*
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* vitrual channel number, such as 128 -144.
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* apply for slimbus only
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*/
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u16 ch_h; /* chanel handle - slimbus only */
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u16 port; /*
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* tabla port for RX and TX
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* such as 0-9 for TX and 10 -16 for RX
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* apply for both i2s and slimbus
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*/
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u16 shift; /*
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* shift bit for RX and TX
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* apply for both i2s and slimbus
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*/
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struct list_head list; /*
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* channel link list
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* apply for both i2s and slimbus
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*/
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};
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struct wcd9xxx_codec_dai_data {
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u32 rate; /* sample rate */
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u32 bit_width; /* sit width 16,24,32 */
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struct list_head wcd9xxx_ch_list; /* channel list */
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u16 grph; /* slimbus group handle */
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unsigned long ch_mask;
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wait_queue_head_t dai_wait;
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bool bus_down_in_recovery;
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};
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#define WCD9XXX_CH(xport, xshift) \
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{.port = xport, .shift = xshift}
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enum wcd9xxx_chipid_major {
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TABLA_MAJOR = cpu_to_le16(0x100),
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SITAR_MAJOR = cpu_to_le16(0x101),
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TAIKO_MAJOR = cpu_to_le16(0x102),
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TAPAN_MAJOR = cpu_to_le16(0x103),
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TOMTOM_MAJOR = cpu_to_le16(0x105),
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TASHA_MAJOR = cpu_to_le16(0x0),
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TASHA2P0_MAJOR = cpu_to_le16(0x107),
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TAVIL_MAJOR = cpu_to_le16(0x108),
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};
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enum codec_power_states {
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WCD_REGION_POWER_COLLAPSE_REMOVE,
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WCD_REGION_POWER_COLLAPSE_BEGIN,
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WCD_REGION_POWER_DOWN,
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};
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enum wcd_power_regions {
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WCD9XXX_DIG_CORE_REGION_1,
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WCD9XXX_MAX_PWR_REGIONS,
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};
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struct wcd9xxx_codec_type {
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u16 id_major;
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u16 id_minor;
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struct mfd_cell *dev;
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int size;
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int num_irqs;
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int version; /* -1 to retrieve version from chip version register */
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enum wcd9xxx_slim_slave_addr_type slim_slave_type;
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u16 i2c_chip_status;
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const struct intr_data *intr_tbl;
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int intr_tbl_size;
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u16 intr_reg[WCD9XXX_INTR_REG_MAX];
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};
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struct wcd9xxx_power_region {
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enum codec_power_states power_state;
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u16 pwr_collapse_reg_min;
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u16 pwr_collapse_reg_max;
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};
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struct wcd9xxx {
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struct device *dev;
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struct slim_device *slim;
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struct slim_device *slim_slave;
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struct mutex io_lock;
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struct mutex xfer_lock;
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struct mutex reset_lock;
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u8 version;
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int reset_gpio;
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struct device_node *wcd_rst_np;
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int (*read_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg,
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int bytes, void *dest, bool interface_reg);
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int (*write_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg,
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int bytes, void *src, bool interface_reg);
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int (*multi_reg_write)(struct wcd9xxx *wcd9xxx, const void *data,
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size_t count);
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int (*dev_down)(struct wcd9xxx *wcd9xxx);
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int (*post_reset)(struct wcd9xxx *wcd9xxx);
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void *ssr_priv;
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bool dev_up;
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u32 num_of_supplies;
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struct regulator_bulk_data *supplies;
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struct wcd9xxx_core_resource core_res;
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u16 id_minor;
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u16 id_major;
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/* Slimbus or I2S port */
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u32 num_rx_port;
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u32 num_tx_port;
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struct wcd9xxx_ch *rx_chs;
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struct wcd9xxx_ch *tx_chs;
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u32 mclk_rate;
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enum codec_variant type;
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struct regmap *regmap;
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struct wcd9xxx_codec_type *codec_type;
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bool prev_pg_valid;
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u8 prev_pg;
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u8 avoid_cdc_rstlow;
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struct wcd9xxx_power_region *wcd9xxx_pwr[WCD9XXX_MAX_PWR_REGIONS];
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};
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struct wcd9xxx_reg_val {
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unsigned short reg; /* register address */
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u8 *buf; /* buffer to be written to reg. addr */
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int bytes; /* number of bytes to be written */
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};
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#ifdef CONFIG_WCD9XXX_CODEC_CORE
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int wcd9xxx_interface_reg_read(struct wcd9xxx *wcd9xxx, unsigned short reg);
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int wcd9xxx_interface_reg_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
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u8 val);
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int wcd9xxx_get_logical_addresses(u8 *pgd_la, u8 *inf_la);
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int wcd9xxx_slim_write_repeat(struct wcd9xxx *wcd9xxx, unsigned short reg,
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int bytes, void *src);
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int wcd9xxx_slim_reserve_bw(struct wcd9xxx *wcd9xxx,
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u32 bw_ops, bool commit);
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int wcd9xxx_set_power_state(struct wcd9xxx *wcd9xxx, enum codec_power_states,
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enum wcd_power_regions);
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int wcd9xxx_get_current_power_state(struct wcd9xxx *wcd9xxx,
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enum wcd_power_regions);
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int wcd9xxx_page_write(struct wcd9xxx *wcd9xxx, unsigned short *reg);
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int wcd9xxx_slim_bulk_write(struct wcd9xxx *wcd9xxx,
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struct wcd9xxx_reg_val *bulk_reg,
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unsigned int size, bool interface);
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int wcd9xxx_vote_ondemand_regulator(struct wcd9xxx *wcd9xxx,
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struct wcd9xxx_pdata *pdata,
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const char *supply_name,
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bool enable);
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extern int wcd9xxx_core_res_init(
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struct wcd9xxx_core_resource *wcd9xxx_core_res,
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int num_irqs, int num_irq_regs, struct regmap *wcd_regmap);
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extern void wcd9xxx_core_res_deinit(
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struct wcd9xxx_core_resource *wcd9xxx_core_res);
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extern int wcd9xxx_core_res_suspend(
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struct wcd9xxx_core_resource *wcd9xxx_core_res,
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pm_message_t pmesg);
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extern int wcd9xxx_core_res_resume(
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struct wcd9xxx_core_resource *wcd9xxx_core_res);
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extern int wcd9xxx_core_irq_init(
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struct wcd9xxx_core_resource *wcd9xxx_core_res);
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extern int wcd9xxx_assign_irq(struct wcd9xxx_core_resource *wcd9xxx_core_res,
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unsigned int irq,
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unsigned int irq_base);
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extern enum wcd9xxx_intf_status wcd9xxx_get_intf_type(void);
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extern void wcd9xxx_set_intf_type(enum wcd9xxx_intf_status);
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extern enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(
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struct wcd9xxx_core_resource *wcd9xxx_core_res,
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enum wcd9xxx_pm_state o,
|
|
enum wcd9xxx_pm_state n);
|
|
static inline int __init wcd9xxx_irq_of_init(struct device_node *node,
|
|
struct device_node *parent)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int wcd9xxx_init(void);
|
|
void wcd9xxx_exit(void);
|
|
#else
|
|
int wcd9xxx_interface_reg_read(struct wcd9xxx *wcd9xxx, unsigned short reg)
|
|
{
|
|
return 0;
|
|
}
|
|
int wcd9xxx_interface_reg_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
|
|
u8 val)
|
|
{
|
|
return 0;
|
|
}
|
|
int wcd9xxx_get_logical_addresses(u8 *pgd_la, u8 *inf_la)
|
|
{
|
|
return 0;
|
|
}
|
|
int wcd9xxx_slim_write_repeat(struct wcd9xxx *wcd9xxx, unsigned short reg,
|
|
int bytes, void *src)
|
|
{
|
|
return 0;
|
|
}
|
|
int wcd9xxx_slim_reserve_bw(struct wcd9xxx *wcd9xxx,
|
|
u32 bw_ops, bool commit)
|
|
{
|
|
return 0;
|
|
}
|
|
int wcd9xxx_set_power_state(struct wcd9xxx *wcd9xxx, enum codec_power_states
|
|
cdc_power_state, enum wcd_power_regions pwr_region)
|
|
{
|
|
return 0;
|
|
}
|
|
int wcd9xxx_get_current_power_state(struct wcd9xxx *wcd9xxx,
|
|
enum wcd_power_regions pwr_region)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int wcd9xxx_page_write(struct wcd9xxx *wcd9xxx, unsigned short *reg)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int wcd9xxx_slim_bulk_write(struct wcd9xxx *wcd9xxx,
|
|
struct wcd9xxx_reg_val *bulk_reg,
|
|
unsigned int size, bool interface)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
extern int wcd9xxx_core_res_init(
|
|
struct wcd9xxx_core_resource *wcd9xxx_core_res,
|
|
int num_irqs, int num_irq_regs, struct regmap *wcd_regmap)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
extern void wcd9xxx_core_res_deinit(
|
|
struct wcd9xxx_core_resource *wcd9xxx_core_res)
|
|
{
|
|
}
|
|
|
|
extern int wcd9xxx_core_res_suspend(
|
|
struct wcd9xxx_core_resource *wcd9xxx_core_res,
|
|
pm_message_t pmesg)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
extern int wcd9xxx_core_res_resume(
|
|
struct wcd9xxx_core_resource *wcd9xxx_core_res)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
extern int wcd9xxx_core_irq_init(
|
|
struct wcd9xxx_core_resource *wcd9xxx_core_res)
|
|
{
|
|
return 0;
|
|
}
|
|
extern int wcd9xxx_assign_irq(struct wcd9xxx_core_resource *wcd9xxx_core_res,
|
|
unsigned int irq,
|
|
unsigned int irq_base)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
extern enum wcd9xxx_intf_status wcd9xxx_get_intf_type(void)
|
|
{
|
|
return 0;
|
|
}
|
|
extern void wcd9xxx_set_intf_type(enum wcd9xxx_intf_status int_state)
|
|
{
|
|
}
|
|
|
|
extern enum wcd9xxx_pm_state wcd9xxx_pm_cmpxchg(
|
|
struct wcd9xxx_core_resource *wcd9xxx_core_res,
|
|
enum wcd9xxx_pm_state o,
|
|
enum wcd9xxx_pm_state n)
|
|
{
|
|
return 0;
|
|
}
|
|
static inline int __init wcd9xxx_irq_of_init(struct device_node *node,
|
|
struct device_node *parent)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int wcd9xxx_init(void)
|
|
{
|
|
return 0;
|
|
}
|
|
void wcd9xxx_exit(void)
|
|
{
|
|
}
|
|
|
|
#endif
|
|
#endif
|