367 lines
10 KiB
C
367 lines
10 KiB
C
/*
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* This module supports the iSeries PCI bus interrupt handling
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* Copyright (C) 20yy <Robert L Holtorf> <IBM Corp>
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* Copyright (C) 2004-2005 IBM Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the:
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* Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330,
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* Boston, MA 02111-1307 USA
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*
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* Change Activity:
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* Created, December 13, 2000 by Wayne Holm
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* End Change Activity
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*/
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#include <linux/config.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/threads.h>
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#include <linux/smp.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/bootmem.h>
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#include <linux/ide.h>
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#include <linux/irq.h>
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#include <linux/spinlock.h>
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#include <asm/ppcdebug.h>
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#include <asm/iSeries/HvTypes.h>
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#include <asm/iSeries/HvLpEvent.h>
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#include <asm/iseries/hv_call_xm.h>
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#include "irq.h"
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#include "call_pci.h"
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/* This maps virtual irq numbers to real irqs */
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unsigned int virt_irq_to_real_map[NR_IRQS];
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/* The next available virtual irq number */
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/* Note: the pcnet32 driver assumes irq numbers < 2 aren't valid. :( */
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static int next_virtual_irq = 2;
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static long Pci_Interrupt_Count;
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static long Pci_Event_Count;
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enum XmPciLpEvent_Subtype {
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XmPciLpEvent_BusCreated = 0, // PHB has been created
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XmPciLpEvent_BusError = 1, // PHB has failed
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XmPciLpEvent_BusFailed = 2, // Msg to Secondary, Primary failed bus
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XmPciLpEvent_NodeFailed = 4, // Multi-adapter bridge has failed
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XmPciLpEvent_NodeRecovered = 5, // Multi-adapter bridge has recovered
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XmPciLpEvent_BusRecovered = 12, // PHB has been recovered
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XmPciLpEvent_UnQuiesceBus = 18, // Secondary bus unqiescing
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XmPciLpEvent_BridgeError = 21, // Bridge Error
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XmPciLpEvent_SlotInterrupt = 22 // Slot interrupt
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};
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struct XmPciLpEvent_BusInterrupt {
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HvBusNumber busNumber;
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HvSubBusNumber subBusNumber;
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};
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struct XmPciLpEvent_NodeInterrupt {
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HvBusNumber busNumber;
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HvSubBusNumber subBusNumber;
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HvAgentId deviceId;
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};
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struct XmPciLpEvent {
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struct HvLpEvent hvLpEvent;
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union {
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u64 alignData; // Align on an 8-byte boundary
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struct {
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u32 fisr;
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HvBusNumber busNumber;
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HvSubBusNumber subBusNumber;
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HvAgentId deviceId;
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} slotInterrupt;
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struct XmPciLpEvent_BusInterrupt busFailed;
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struct XmPciLpEvent_BusInterrupt busRecovered;
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struct XmPciLpEvent_BusInterrupt busCreated;
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struct XmPciLpEvent_NodeInterrupt nodeFailed;
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struct XmPciLpEvent_NodeInterrupt nodeRecovered;
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} eventData;
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};
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static void intReceived(struct XmPciLpEvent *eventParm,
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struct pt_regs *regsParm)
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{
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int irq;
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++Pci_Interrupt_Count;
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switch (eventParm->hvLpEvent.xSubtype) {
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case XmPciLpEvent_SlotInterrupt:
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irq = eventParm->hvLpEvent.xCorrelationToken;
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/* Dispatch the interrupt handlers for this irq */
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ppc_irq_dispatch_handler(regsParm, irq);
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HvCallPci_eoi(eventParm->eventData.slotInterrupt.busNumber,
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eventParm->eventData.slotInterrupt.subBusNumber,
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eventParm->eventData.slotInterrupt.deviceId);
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break;
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/* Ignore error recovery events for now */
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case XmPciLpEvent_BusCreated:
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printk(KERN_INFO "intReceived: system bus %d created\n",
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eventParm->eventData.busCreated.busNumber);
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break;
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case XmPciLpEvent_BusError:
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case XmPciLpEvent_BusFailed:
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printk(KERN_INFO "intReceived: system bus %d failed\n",
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eventParm->eventData.busFailed.busNumber);
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break;
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case XmPciLpEvent_BusRecovered:
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case XmPciLpEvent_UnQuiesceBus:
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printk(KERN_INFO "intReceived: system bus %d recovered\n",
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eventParm->eventData.busRecovered.busNumber);
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break;
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case XmPciLpEvent_NodeFailed:
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case XmPciLpEvent_BridgeError:
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printk(KERN_INFO
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"intReceived: multi-adapter bridge %d/%d/%d failed\n",
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eventParm->eventData.nodeFailed.busNumber,
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eventParm->eventData.nodeFailed.subBusNumber,
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eventParm->eventData.nodeFailed.deviceId);
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break;
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case XmPciLpEvent_NodeRecovered:
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printk(KERN_INFO
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"intReceived: multi-adapter bridge %d/%d/%d recovered\n",
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eventParm->eventData.nodeRecovered.busNumber,
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eventParm->eventData.nodeRecovered.subBusNumber,
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eventParm->eventData.nodeRecovered.deviceId);
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break;
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default:
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printk(KERN_ERR
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"intReceived: unrecognized event subtype 0x%x\n",
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eventParm->hvLpEvent.xSubtype);
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break;
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}
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}
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static void XmPciLpEvent_handler(struct HvLpEvent *eventParm,
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struct pt_regs *regsParm)
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{
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#ifdef CONFIG_PCI
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++Pci_Event_Count;
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if (eventParm && (eventParm->xType == HvLpEvent_Type_PciIo)) {
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switch (eventParm->xFlags.xFunction) {
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case HvLpEvent_Function_Int:
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intReceived((struct XmPciLpEvent *)eventParm, regsParm);
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break;
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case HvLpEvent_Function_Ack:
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printk(KERN_ERR
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"XmPciLpEvent_handler: unexpected ack received\n");
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break;
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default:
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printk(KERN_ERR
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"XmPciLpEvent_handler: unexpected event function %d\n",
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(int)eventParm->xFlags.xFunction);
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break;
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}
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} else if (eventParm)
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printk(KERN_ERR
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"XmPciLpEvent_handler: Unrecognized PCI event type 0x%x\n",
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(int)eventParm->xType);
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else
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printk(KERN_ERR "XmPciLpEvent_handler: NULL event received\n");
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#endif
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}
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/*
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* This is called by init_IRQ. set in ppc_md.init_IRQ by iSeries_setup.c
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* It must be called before the bus walk.
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*/
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void __init iSeries_init_IRQ(void)
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{
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/* Register PCI event handler and open an event path */
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int xRc;
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xRc = HvLpEvent_registerHandler(HvLpEvent_Type_PciIo,
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&XmPciLpEvent_handler);
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if (xRc == 0) {
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xRc = HvLpEvent_openPath(HvLpEvent_Type_PciIo, 0);
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if (xRc != 0)
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printk(KERN_ERR "iSeries_init_IRQ: open event path "
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"failed with rc 0x%x\n", xRc);
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} else
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printk(KERN_ERR "iSeries_init_IRQ: register handler "
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"failed with rc 0x%x\n", xRc);
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}
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#define REAL_IRQ_TO_BUS(irq) ((((irq) >> 6) & 0xff) + 1)
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#define REAL_IRQ_TO_IDSEL(irq) ((((irq) >> 3) & 7) + 1)
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#define REAL_IRQ_TO_FUNC(irq) ((irq) & 7)
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/*
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* This will be called by device drivers (via enable_IRQ)
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* to enable INTA in the bridge interrupt status register.
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*/
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static void iSeries_enable_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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/* The IRQ has already been locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Unmask secondary INTA */
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mask = 0x80000000;
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HvCallPci_unmaskInterrupts(bus, subBus, deviceId, mask);
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PPCDBG(PPCDBG_BUSWALK, "iSeries_enable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
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bus, subBus, deviceId, irq);
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}
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/* This is called by iSeries_activate_IRQs */
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static unsigned int iSeries_startup_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Link the IRQ number to the bridge */
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HvCallXm_connectBusUnit(bus, subBus, deviceId, irq);
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/* Unmask bridge interrupts in the FISR */
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mask = 0x01010000 << function;
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HvCallPci_unmaskFisr(bus, subBus, deviceId, mask);
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iSeries_enable_IRQ(irq);
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return 0;
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}
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/*
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* This is called out of iSeries_fixup to activate interrupt
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* generation for usable slots
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*/
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void __init iSeries_activate_IRQs()
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{
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int irq;
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unsigned long flags;
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for_each_irq (irq) {
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irq_desc_t *desc = get_irq_desc(irq);
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if (desc && desc->handler && desc->handler->startup) {
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spin_lock_irqsave(&desc->lock, flags);
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desc->handler->startup(irq);
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spin_unlock_irqrestore(&desc->lock, flags);
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}
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}
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}
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/* this is not called anywhere currently */
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static void iSeries_shutdown_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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/* irq should be locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Invalidate the IRQ number in the bridge */
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HvCallXm_connectBusUnit(bus, subBus, deviceId, 0);
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/* Mask bridge interrupts in the FISR */
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mask = 0x01010000 << function;
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HvCallPci_maskFisr(bus, subBus, deviceId, mask);
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}
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/*
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* This will be called by device drivers (via disable_IRQ)
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* to disable INTA in the bridge interrupt status register.
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*/
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static void iSeries_disable_IRQ(unsigned int irq)
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{
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u32 bus, deviceId, function, mask;
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const u32 subBus = 0;
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unsigned int rirq = virt_irq_to_real_map[irq];
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/* The IRQ has already been locked by the caller */
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bus = REAL_IRQ_TO_BUS(rirq);
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function = REAL_IRQ_TO_FUNC(rirq);
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deviceId = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
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/* Mask secondary INTA */
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mask = 0x80000000;
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HvCallPci_maskInterrupts(bus, subBus, deviceId, mask);
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PPCDBG(PPCDBG_BUSWALK, "iSeries_disable_IRQ 0x%02X.%02X.%02X 0x%04X\n",
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bus, subBus, deviceId, irq);
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}
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/*
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* Need to define this so ppc_irq_dispatch_handler will NOT call
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* enable_IRQ at the end of interrupt handling. However, this does
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* nothing because there is not enough information provided to do
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* the EOI HvCall. This is done by XmPciLpEvent.c
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*/
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static void iSeries_end_IRQ(unsigned int irq)
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{
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}
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static hw_irq_controller iSeries_IRQ_handler = {
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.typename = "iSeries irq controller",
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.startup = iSeries_startup_IRQ,
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.shutdown = iSeries_shutdown_IRQ,
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.enable = iSeries_enable_IRQ,
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.disable = iSeries_disable_IRQ,
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.end = iSeries_end_IRQ
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};
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/*
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* This is called out of iSeries_scan_slot to allocate an IRQ for an EADS slot
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* It calculates the irq value for the slot.
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* Note that subBusNumber is always 0 (at the moment at least).
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*/
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int __init iSeries_allocate_IRQ(HvBusNumber busNumber,
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HvSubBusNumber subBusNumber, HvAgentId deviceId)
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{
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unsigned int realirq, virtirq;
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u8 idsel = (deviceId >> 4);
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u8 function = deviceId & 7;
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virtirq = next_virtual_irq++;
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realirq = ((busNumber - 1) << 6) + ((idsel - 1) << 3) + function;
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virt_irq_to_real_map[virtirq] = realirq;
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irq_desc[virtirq].handler = &iSeries_IRQ_handler;
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return virtirq;
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}
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int virt_irq_create_mapping(unsigned int real_irq)
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{
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BUG(); /* Don't call this on iSeries, yet */
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return 0;
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}
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void virt_irq_init(void)
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{
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return;
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}
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