fced80c735
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
189 lines
5.1 KiB
C
189 lines
5.1 KiB
C
/*
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* linux/arch/arm/mach-omap1/fpga.c
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*
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* Interrupt handler for OMAP-1510 Innovator FPGA
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*
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* Copyright (C) 2001 RidgeRun, Inc.
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* Author: Greg Lonnon <glonnon@ridgerun.com>
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*
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* Copyright (C) 2002 MontaVista Software, Inc.
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*
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* Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
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* Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <mach/fpga.h>
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#include <mach/gpio.h>
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static void fpga_mask_irq(unsigned int irq)
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{
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irq -= OMAP_FPGA_IRQ_BASE;
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if (irq < 8)
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__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
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& ~(1 << irq)), OMAP1510_FPGA_IMR_LO);
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else if (irq < 16)
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__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
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& ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
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else
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__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
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& ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
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}
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static inline u32 get_fpga_unmasked_irqs(void)
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{
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return
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((__raw_readb(OMAP1510_FPGA_ISR_LO) &
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__raw_readb(OMAP1510_FPGA_IMR_LO))) |
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((__raw_readb(OMAP1510_FPGA_ISR_HI) &
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__raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) |
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((__raw_readb(INNOVATOR_FPGA_ISR2) &
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__raw_readb(INNOVATOR_FPGA_IMR2)) << 16);
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}
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static void fpga_ack_irq(unsigned int irq)
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{
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/* Don't need to explicitly ACK FPGA interrupts */
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}
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static void fpga_unmask_irq(unsigned int irq)
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{
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irq -= OMAP_FPGA_IRQ_BASE;
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if (irq < 8)
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__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
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OMAP1510_FPGA_IMR_LO);
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else if (irq < 16)
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__raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
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| (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
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else
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__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
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| (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
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}
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static void fpga_mask_ack_irq(unsigned int irq)
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{
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fpga_mask_irq(irq);
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fpga_ack_irq(irq);
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}
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void innovator_fpga_IRQ_demux(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_desc *d;
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u32 stat;
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int fpga_irq;
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stat = get_fpga_unmasked_irqs();
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if (!stat)
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return;
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for (fpga_irq = OMAP_FPGA_IRQ_BASE;
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(fpga_irq < OMAP_FPGA_IRQ_END) && stat;
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fpga_irq++, stat >>= 1) {
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if (stat & 1) {
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d = irq_desc + fpga_irq;
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desc_handle_irq(fpga_irq, d);
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}
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}
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}
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static struct irq_chip omap_fpga_irq_ack = {
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.name = "FPGA-ack",
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.ack = fpga_mask_ack_irq,
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.mask = fpga_mask_irq,
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.unmask = fpga_unmask_irq,
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};
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static struct irq_chip omap_fpga_irq = {
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.name = "FPGA",
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.ack = fpga_ack_irq,
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.mask = fpga_mask_irq,
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.unmask = fpga_unmask_irq,
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};
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/*
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* All of the FPGA interrupt request inputs except for the touchscreen are
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* edge-sensitive; the touchscreen is level-sensitive. The edge-sensitive
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* interrupts are acknowledged as a side-effect of reading the interrupt
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* status register from the FPGA. The edge-sensitive interrupt inputs
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* cause a problem with level interrupt requests, such as Ethernet. The
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* problem occurs when a level interrupt request is asserted while its
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* interrupt input is masked in the FPGA, which results in a missed
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* interrupt.
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*
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* In an attempt to workaround the problem with missed interrupts, the
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* mask_ack routine for all of the FPGA interrupts has been changed from
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* fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt
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* being serviced is left unmasked. We can do this because the FPGA cascade
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* interrupt is installed with the IRQF_DISABLED flag, which leaves all
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* interrupts masked at the CPU while an FPGA interrupt handler executes.
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*
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* Limited testing indicates that this workaround appears to be effective
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* for the smc9194 Ethernet driver used on the Innovator. It should work
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* on other FPGA interrupts as well, but any drivers that explicitly mask
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* interrupts at the interrupt controller via disable_irq/enable_irq
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* could pose a problem.
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*/
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void omap1510_fpga_init_irq(void)
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{
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int i;
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__raw_writeb(0, OMAP1510_FPGA_IMR_LO);
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__raw_writeb(0, OMAP1510_FPGA_IMR_HI);
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__raw_writeb(0, INNOVATOR_FPGA_IMR2);
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for (i = OMAP_FPGA_IRQ_BASE; i < OMAP_FPGA_IRQ_END; i++) {
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if (i == OMAP1510_INT_FPGA_TS) {
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/*
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* The touchscreen interrupt is level-sensitive, so
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* we'll use the regular mask_ack routine for it.
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*/
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set_irq_chip(i, &omap_fpga_irq_ack);
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}
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else {
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/*
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* All FPGA interrupts except the touchscreen are
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* edge-sensitive, so we won't mask them.
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*/
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set_irq_chip(i, &omap_fpga_irq);
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}
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set_irq_handler(i, handle_edge_irq);
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set_irq_flags(i, IRQF_VALID);
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}
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/*
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* The FPGA interrupt line is connected to GPIO13. Claim this pin for
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* the ARM.
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*
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* NOTE: For general GPIO/MPUIO access and interrupts, please see
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* gpio.[ch]
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*/
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omap_request_gpio(13);
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omap_set_gpio_direction(13, 1);
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set_irq_type(OMAP_GPIO_IRQ(13), IRQ_TYPE_EDGE_RISING);
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set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
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}
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EXPORT_SYMBOL(omap1510_fpga_init_irq);
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