d7b604891b
Values for the sac field have changed - update code accordingly. Signed-off-by: Peter Oberparleiter <peter.oberparleiter@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
312 lines
7.8 KiB
C
312 lines
7.8 KiB
C
/*
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* Functions for assembling fcx enabled I/O control blocks.
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*
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* Copyright IBM Corp. 2008
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* Author(s): Peter Oberparleiter <peter.oberparleiter@de.ibm.com>
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*/
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#ifndef _ASM_S390_FCX_H
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#define _ASM_S390_FCX_H _ASM_S390_FCX_H
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#include <linux/types.h>
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#define TCW_FORMAT_DEFAULT 0
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#define TCW_TIDAW_FORMAT_DEFAULT 0
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#define TCW_FLAGS_INPUT_TIDA 1 << (23 - 5)
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#define TCW_FLAGS_TCCB_TIDA 1 << (23 - 6)
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#define TCW_FLAGS_OUTPUT_TIDA 1 << (23 - 7)
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#define TCW_FLAGS_TIDAW_FORMAT(x) ((x) & 3) << (23 - 9)
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#define TCW_FLAGS_GET_TIDAW_FORMAT(x) (((x) >> (23 - 9)) & 3)
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/**
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* struct tcw - Transport Control Word (TCW)
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* @format: TCW format
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* @flags: TCW flags
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* @tccbl: Transport-Command-Control-Block Length
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* @r: Read Operations
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* @w: Write Operations
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* @output: Output-Data Address
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* @input: Input-Data Address
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* @tsb: Transport-Status-Block Address
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* @tccb: Transport-Command-Control-Block Address
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* @output_count: Output Count
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* @input_count: Input Count
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* @intrg: Interrogate TCW Address
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*/
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struct tcw {
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u32 format:2;
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u32 :6;
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u32 flags:24;
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u32 :8;
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u32 tccbl:6;
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u32 r:1;
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u32 w:1;
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u32 :16;
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u64 output;
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u64 input;
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u64 tsb;
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u64 tccb;
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u32 output_count;
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u32 input_count;
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u32 :32;
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u32 :32;
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u32 :32;
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u32 intrg;
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} __attribute__ ((packed, aligned(64)));
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#define TIDAW_FLAGS_LAST 1 << (7 - 0)
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#define TIDAW_FLAGS_SKIP 1 << (7 - 1)
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#define TIDAW_FLAGS_DATA_INT 1 << (7 - 2)
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#define TIDAW_FLAGS_TTIC 1 << (7 - 3)
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#define TIDAW_FLAGS_INSERT_CBC 1 << (7 - 4)
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/**
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* struct tidaw - Transport-Indirect-Addressing Word (TIDAW)
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* @flags: TIDAW flags. Can be an arithmetic OR of the following constants:
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* %TIDAW_FLAGS_LAST, %TIDAW_FLAGS_SKIP, %TIDAW_FLAGS_DATA_INT,
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* %TIDAW_FLAGS_TTIC, %TIDAW_FLAGS_INSERT_CBC
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* @count: Count
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* @addr: Address
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*/
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struct tidaw {
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u32 flags:8;
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u32 :24;
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u32 count;
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u64 addr;
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} __attribute__ ((packed, aligned(16)));
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/**
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* struct tsa_iostat - I/O-Status Transport-Status Area (IO-Stat TSA)
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* @dev_time: Device Time
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* @def_time: Defer Time
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* @queue_time: Queue Time
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* @dev_busy_time: Device-Busy Time
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* @dev_act_time: Device-Active-Only Time
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* @sense: Sense Data (if present)
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*/
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struct tsa_iostat {
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u32 dev_time;
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u32 def_time;
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u32 queue_time;
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u32 dev_busy_time;
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u32 dev_act_time;
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u8 sense[32];
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} __attribute__ ((packed));
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/**
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* struct tsa_ddpcs - Device-Detected-Program-Check Transport-Status Area (DDPC TSA)
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* @rc: Reason Code
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* @rcq: Reason Code Qualifier
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* @sense: Sense Data (if present)
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*/
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struct tsa_ddpc {
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u32 :24;
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u32 rc:8;
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u8 rcq[16];
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u8 sense[32];
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} __attribute__ ((packed));
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#define TSA_INTRG_FLAGS_CU_STATE_VALID 1 << (7 - 0)
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#define TSA_INTRG_FLAGS_DEV_STATE_VALID 1 << (7 - 1)
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#define TSA_INTRG_FLAGS_OP_STATE_VALID 1 << (7 - 2)
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/**
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* struct tsa_intrg - Interrogate Transport-Status Area (Intrg. TSA)
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* @format: Format
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* @flags: Flags. Can be an arithmetic OR of the following constants:
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* %TSA_INTRG_FLAGS_CU_STATE_VALID, %TSA_INTRG_FLAGS_DEV_STATE_VALID,
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* %TSA_INTRG_FLAGS_OP_STATE_VALID
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* @cu_state: Controle-Unit State
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* @dev_state: Device State
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* @op_state: Operation State
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* @sd_info: State-Dependent Information
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* @dl_id: Device-Level Identifier
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* @dd_data: Device-Dependent Data
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*/
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struct tsa_intrg {
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u32 format:8;
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u32 flags:8;
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u32 cu_state:8;
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u32 dev_state:8;
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u32 op_state:8;
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u32 :24;
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u8 sd_info[12];
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u32 dl_id;
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u8 dd_data[28];
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} __attribute__ ((packed));
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#define TSB_FORMAT_NONE 0
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#define TSB_FORMAT_IOSTAT 1
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#define TSB_FORMAT_DDPC 2
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#define TSB_FORMAT_INTRG 3
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#define TSB_FLAGS_DCW_OFFSET_VALID 1 << (7 - 0)
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#define TSB_FLAGS_COUNT_VALID 1 << (7 - 1)
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#define TSB_FLAGS_CACHE_MISS 1 << (7 - 2)
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#define TSB_FLAGS_TIME_VALID 1 << (7 - 3)
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#define TSB_FLAGS_FORMAT(x) ((x) & 7)
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#define TSB_FORMAT(t) ((t)->flags & 7)
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/**
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* struct tsb - Transport-Status Block (TSB)
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* @length: Length
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* @flags: Flags. Can be an arithmetic OR of the following constants:
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* %TSB_FLAGS_DCW_OFFSET_VALID, %TSB_FLAGS_COUNT_VALID, %TSB_FLAGS_CACHE_MISS,
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* %TSB_FLAGS_TIME_VALID
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* @dcw_offset: DCW Offset
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* @count: Count
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* @tsa: Transport-Status-Area
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*/
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struct tsb {
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u32 length:8;
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u32 flags:8;
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u32 dcw_offset:16;
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u32 count;
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u32 :32;
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union {
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struct tsa_iostat iostat;
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struct tsa_ddpc ddpc;
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struct tsa_intrg intrg;
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} __attribute__ ((packed)) tsa;
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} __attribute__ ((packed, aligned(8)));
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#define DCW_INTRG_FORMAT_DEFAULT 0
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#define DCW_INTRG_RC_UNSPECIFIED 0
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#define DCW_INTRG_RC_TIMEOUT 1
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#define DCW_INTRG_RCQ_UNSPECIFIED 0
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#define DCW_INTRG_RCQ_PRIMARY 1
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#define DCW_INTRG_RCQ_SECONDARY 2
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#define DCW_INTRG_FLAGS_MPM 1 < (7 - 0)
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#define DCW_INTRG_FLAGS_PPR 1 < (7 - 1)
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#define DCW_INTRG_FLAGS_CRIT 1 < (7 - 2)
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/**
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* struct dcw_intrg_data - Interrogate DCW data
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* @format: Format. Should be %DCW_INTRG_FORMAT_DEFAULT
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* @rc: Reason Code. Can be one of %DCW_INTRG_RC_UNSPECIFIED,
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* %DCW_INTRG_RC_TIMEOUT
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* @rcq: Reason Code Qualifier: Can be one of %DCW_INTRG_RCQ_UNSPECIFIED,
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* %DCW_INTRG_RCQ_PRIMARY, %DCW_INTRG_RCQ_SECONDARY
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* @lpm: Logical-Path Mask
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* @pam: Path-Available Mask
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* @pim: Path-Installed Mask
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* @timeout: Timeout
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* @flags: Flags. Can be an arithmetic OR of %DCW_INTRG_FLAGS_MPM,
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* %DCW_INTRG_FLAGS_PPR, %DCW_INTRG_FLAGS_CRIT
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* @time: Time
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* @prog_id: Program Identifier
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* @prog_data: Program-Dependent Data
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*/
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struct dcw_intrg_data {
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u32 format:8;
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u32 rc:8;
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u32 rcq:8;
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u32 lpm:8;
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u32 pam:8;
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u32 pim:8;
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u32 timeout:16;
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u32 flags:8;
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u32 :24;
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u32 :32;
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u64 time;
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u64 prog_id;
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u8 prog_data[0];
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} __attribute__ ((packed));
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#define DCW_FLAGS_CC 1 << (7 - 1)
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#define DCW_CMD_WRITE 0x01
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#define DCW_CMD_READ 0x02
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#define DCW_CMD_CONTROL 0x03
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#define DCW_CMD_SENSE 0x04
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#define DCW_CMD_SENSE_ID 0xe4
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#define DCW_CMD_INTRG 0x40
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/**
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* struct dcw - Device-Command Word (DCW)
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* @cmd: Command Code. Can be one of %DCW_CMD_WRITE, %DCW_CMD_READ,
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* %DCW_CMD_CONTROL, %DCW_CMD_SENSE, %DCW_CMD_SENSE_ID, %DCW_CMD_INTRG
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* @flags: Flags. Can be an arithmetic OR of %DCW_FLAGS_CC
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* @cd_count: Control-Data Count
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* @count: Count
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* @cd: Control Data
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*/
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struct dcw {
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u32 cmd:8;
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u32 flags:8;
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u32 :8;
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u32 cd_count:8;
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u32 count;
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u8 cd[0];
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} __attribute__ ((packed));
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#define TCCB_FORMAT_DEFAULT 0x7f
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#define TCCB_MAX_DCW 30
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#define TCCB_MAX_SIZE (sizeof(struct tccb_tcah) + \
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TCCB_MAX_DCW * sizeof(struct dcw) + \
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sizeof(struct tccb_tcat))
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#define TCCB_SAC_DEFAULT 0x1ffe
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#define TCCB_SAC_INTRG 0x1fff
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/**
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* struct tccb_tcah - Transport-Command-Area Header (TCAH)
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* @format: Format. Should be %TCCB_FORMAT_DEFAULT
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* @tcal: Transport-Command-Area Length
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* @sac: Service-Action Code. Can be one of %TCCB_SAC_DEFAULT, %TCCB_SAC_INTRG
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* @prio: Priority
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*/
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struct tccb_tcah {
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u32 format:8;
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u32 :24;
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u32 :24;
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u32 tcal:8;
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u32 sac:16;
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u32 :8;
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u32 prio:8;
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u32 :32;
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} __attribute__ ((packed));
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/**
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* struct tccb_tcat - Transport-Command-Area Trailer (TCAT)
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* @count: Transport Count
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*/
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struct tccb_tcat {
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u32 :32;
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u32 count;
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} __attribute__ ((packed));
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/**
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* struct tccb - (partial) Transport-Command-Control Block (TCCB)
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* @tcah: TCAH
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* @tca: Transport-Command Area
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*/
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struct tccb {
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struct tccb_tcah tcah;
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u8 tca[0];
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} __attribute__ ((packed, aligned(8)));
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struct tcw *tcw_get_intrg(struct tcw *tcw);
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void *tcw_get_data(struct tcw *tcw);
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struct tccb *tcw_get_tccb(struct tcw *tcw);
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struct tsb *tcw_get_tsb(struct tcw *tcw);
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void tcw_init(struct tcw *tcw, int r, int w);
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void tcw_finalize(struct tcw *tcw, int num_tidaws);
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void tcw_set_intrg(struct tcw *tcw, struct tcw *intrg_tcw);
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void tcw_set_data(struct tcw *tcw, void *data, int use_tidal);
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void tcw_set_tccb(struct tcw *tcw, struct tccb *tccb);
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void tcw_set_tsb(struct tcw *tcw, struct tsb *tsb);
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void tccb_init(struct tccb *tccb, size_t tccb_size, u32 sac);
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void tsb_init(struct tsb *tsb);
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struct dcw *tccb_add_dcw(struct tccb *tccb, size_t tccb_size, u8 cmd, u8 flags,
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void *cd, u8 cd_count, u32 count);
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struct tidaw *tcw_add_tidaw(struct tcw *tcw, int num_tidaws, u8 flags,
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void *addr, u32 count);
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#endif /* _ASM_S390_FCX_H */
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