54e269ead6
Patch from Deepak Saxena The expansion bus on the IXP46x NPU can be configured for either 32MiB or 16MiB windows and changing the configuration causes the base address for each chip select for each region to change. Because of this, we cannot hardcode the physical base as we currently do. This patch checks the expansion bus configuration registers at runtime to determine the appropriate window size. Note that this requires that the bootloader already configured the device sizes appropriately, but I feel that is valid assumption to make as the bootloader must configure and access the flash window, the output display (LCD, LEDs, etc) window, and other expansion bus devices. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
118 lines
2.7 KiB
C
118 lines
2.7 KiB
C
/*
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* include/asm-arm/arch-ixp4xx/platform.h
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*
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* Constants and functions that are useful to IXP4xx platform-specific code
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* and device drivers.
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*
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* Copyright (C) 2004 MontaVista Software, Inc.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#ifndef __ASSEMBLY__
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#include <asm/types.h>
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#ifndef __ARMEB__
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#define REG_OFFSET 0
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#else
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#define REG_OFFSET 3
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#endif
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/*
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* Expansion bus memory regions
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*/
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#define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000)
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/*
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* The expansion bus on the IXP4xx can be configured for either 16 or
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* 32MB windows and the CS offset for each region changes based on the
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* current configuration. This means that we cannot simply hardcode
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* each offset. ixp4xx_sys_init() looks at the expansion bus configuration
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* as setup by the bootloader to determine our window size.
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*/
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extern unsigned long ixp4xx_exp_bus_size;
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#define IXP4XX_EXP_BUS_BASE(region)\
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(IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size))
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#define IXP4XX_FLASH_WRITABLE (0x2)
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#define IXP4XX_FLASH_DEFAULT (0xbcd23c40)
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#define IXP4XX_FLASH_WRITE (0xbcd23c42)
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/*
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* Clock Speed Definitions.
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*/
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#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */
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#define IXP4XX_UART_XTAL 14745600
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/*
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* The IXP4xx chips do not have an I2C unit, so GPIO lines are just
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* used to
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* Used as platform_data to provide GPIO pin information to the ixp42x
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* I2C driver.
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*/
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struct ixp4xx_i2c_pins {
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unsigned long sda_pin;
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unsigned long scl_pin;
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};
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struct sys_timer;
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/*
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* Functions used by platform-level setup code
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*/
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extern void ixp4xx_map_io(void);
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extern void ixp4xx_init_irq(void);
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extern void ixp4xx_sys_init(void);
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extern struct sys_timer ixp4xx_timer;
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extern void ixp4xx_pci_preinit(void);
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struct pci_sys_data;
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extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
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extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
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/*
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* GPIO-functions
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*/
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/*
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* The following converted to the real HW bits the gpio_line_config
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*/
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/* GPIO pin types */
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#define IXP4XX_GPIO_OUT 0x1
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#define IXP4XX_GPIO_IN 0x2
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/* GPIO signal types */
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#define IXP4XX_GPIO_LOW 0
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#define IXP4XX_GPIO_HIGH 1
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/* GPIO Clocks */
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#define IXP4XX_GPIO_CLK_0 14
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#define IXP4XX_GPIO_CLK_1 15
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static inline void gpio_line_config(u8 line, u32 direction)
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{
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if (direction == IXP4XX_GPIO_IN)
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*IXP4XX_GPIO_GPOER |= (1 << line);
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else
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*IXP4XX_GPIO_GPOER &= ~(1 << line);
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}
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static inline void gpio_line_get(u8 line, int *value)
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{
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*value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
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}
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static inline void gpio_line_set(u8 line, int value)
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{
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if (value == IXP4XX_GPIO_HIGH)
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*IXP4XX_GPIO_GPOUTR |= (1 << line);
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else if (value == IXP4XX_GPIO_LOW)
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*IXP4XX_GPIO_GPOUTR &= ~(1 << line);
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}
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#endif // __ASSEMBLY__
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